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ampere-computing/llvm.git
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release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
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avx512-build-vector.ll
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2017-12-07
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
Francis Visoiu Mistrih
2017-12-04
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-11-28
[CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih
2017-08-03
[X86] SET0 to use XMM registers where possible PR26018 PR32862
Dinar Temirbulatov
2017-08-02
X86: Do not use llc -march in tests.
Matthias Braun
2016-10-16
[AVX-512] Correct execution domain for VPERMT2PS and VPERMI2PS.
Craig Topper
2016-10-14
[DAGCombiner] Teach createBuildVecShuffle to handle cases where input vectors...
Craig Topper
2016-08-03
[X86][SSE] Enable target shuffle combining to combine multiple shuffle inputs.
Simon Pilgrim
2016-07-11
[AVX512] Use vpternlog with an immediate of 0xff to create 512-bit all one ve...
Craig Topper
2015-11-23
Make utils/update_llc_test_checks.py note that the assertions are
James Y Knight
2015-06-22
Reverted AVX-512 vector shuffle
Elena Demikhovsky
2015-06-01
AVX-512: Optimized vector shuffle for v16f32 and v16i32 types.
Elena Demikhovsky
2015-02-27
[opaque pointer type] Add textual IR support for explicit type parameter to l...
David Blaikie
2014-10-05
[x86] Teach the new vector shuffle lowering how to lower 128-bit
Chandler Carruth
2014-10-04
[x86] Enable the new vector shuffle lowering by default.
Chandler Carruth
2014-10-03
[x86] Regenerate a bunch more avx512 test cases using my script to have
Chandler Carruth
2014-02-11
AVX-512: Optimized BUILD_VECTOR pattern;
Elena Demikhovsky
2013-08-25
AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectors
Elena Demikhovsky