Age | Commit message (Expand) | Author |
---|---|---|
2017-12-15 | [RISCV] Enable emission of alias instructions by default | Alex Bradbury |
2017-12-11 | [RISCV] Implement prolog and epilog insertion | Alex Bradbury |
2017-12-11 | [RISCV] Support lowering FrameIndex | Alex Bradbury |
2017-12-04 | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih |
2017-11-21 | [RISCV] Use register X0 (ZERO) for constant 0 | Alex Bradbury |
2017-11-21 | [RISCV] Support and tests for a variety of additional LLVM IR constructs | Alex Bradbury |