| Age | Commit message (Expand) | Author |
|---|
| 2018-08-27 | Merging r340641: | Hans Wennborg |
| 2018-08-16 | Merging r339769: | Hans Wennborg |
| 2018-08-02 | Merging r338658: | Hans Wennborg |
| 2018-07-30 | [DAGCombiner] transform sub-of-shifted-signbit to add | Sanjay Patel |
| 2018-07-27 | [AArch64, PowerPC, x86] add more signbit math tests; NFC | Sanjay Patel |
| 2018-07-27 | [AArch64, PowerPC, x86] add more signbit math tests; NFC | Sanjay Patel |
| 2018-07-27 | [DAGCombiner] fold 'not' with signbit math | Sanjay Patel |
| 2018-07-27 | [PowerPC] add more tests for signbit math; NFC | Sanjay Patel |
| 2018-07-25 | [SelectionDAG] try to convert funnel shift directly to rotate if legal | Sanjay Patel |
| 2018-07-25 | [AArch, PowerPC] add more tests for legal rotate ops; NFC | Sanjay Patel |
| 2018-07-19 | [Power9] Code Cleanup - Remove needsAggressiveScheduling() | Stefan Pintilie |
| 2018-07-18 | Introduce codegen for the Signal Processing Engine | Justin Hibbits |
| 2018-07-16 | [Intrinsics] define funnel shift IR intrinsics + DAG builder support | Sanjay Patel |
| 2018-07-15 | [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X) | Sanjay Patel |
| 2018-07-13 | [PowerPC] Materialize more constants with CR-field set in late peephole | Nemanja Ivanovic |
| 2018-07-12 | [PowerPC] [NFC] Update __float128 tests | Stefan Pintilie |
| 2018-07-11 | [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests | Joel E. Denny |
| 2018-07-11 | [Power9] Add remaining __flaot128 builtin support for FMA round to odd | Stefan Pintilie |
| 2018-07-09 | [Power9] Add __float128 builtins for Rounding Operations | Stefan Pintilie |
| 2018-07-09 | [Power9] [LLVM] Add __float128 support for trunc to double round to odd | Stefan Pintilie |
| 2018-07-09 | [Power9] Add __float128 builtins for Round To Odd | Stefan Pintilie |
| 2018-07-09 | [Power9] Add __float128 support for compare operations | Stefan Pintilie |
| 2018-07-06 | [Power9] Add __float128 library call for frem | Stefan Pintilie |
| 2018-07-05 | [Power9] Add lib calls for float128 operations with no equivalent PPC instruc... | Lei Huang |
| 2018-07-05 | [AArch64, PowerPC, x86] add tests for signbit bit hacks; NFC | Sanjay Patel |
| 2018-07-05 | [Power9] Optimize codgen for conversions of int to float128 | Lei Huang |
| 2018-07-05 | [Power9][NFC] add back-end tests for passing homogeneous fp128 aggregates by ... | Lei Huang |
| 2018-07-05 | [Power9] Add tests for passing float128 in VSX reg for non-homogenous aggregates | Lei Huang |
| 2018-07-05 | [Power9]Legalize and emit code for quad-precision convert from single-precision | Lei Huang |
| 2018-07-05 | [Power9] Implement float128 parameter passing and return values | Lei Huang |
| 2018-07-04 | [Power9]Legalize and emit code for round & convert quad-precision values | Lei Huang |
| 2018-07-04 | [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler | Stefan Pintilie |
| 2018-07-04 | NFC - Various typo fixes in tests | Gabor Buella |
| 2018-07-02 | [PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multip... | QingShan Zhang |
| 2018-06-27 | [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros | Sanjay Patel |
| 2018-06-24 | [DAGCombiner] eliminate setcc bool math when input is low-bit of some value | Sanjay Patel |
| 2018-06-22 | [PowerPC] add more tests for bit hacking opportunities with setcc; NFC | Sanjay Patel |
| 2018-06-22 | [PowerPC] add tests for bit hacking opportunities with setcc; NFC | Sanjay Patel |
| 2018-06-21 | [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property | Mikael Holmen |
| 2018-06-20 | Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnly... | Alina Sbirlea |
| 2018-06-20 | Allow binop C1, (select cc, CF, CT) -> select folding | Stanislav Mekhanoshin |
| 2018-06-19 | [PowerPC] Fix label address calculation for ppc32 | Strahinja Petrovic |
| 2018-06-19 | If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction ... | QingShan Zhang |
| 2018-06-18 | Tests for dag combine select (binop) -> select. NFC. | Stanislav Mekhanoshin |
| 2018-06-16 | Utilize new SDNode flag functionality to expand current support for fma | Michael Berg |
| 2018-06-07 | propagate fast math flags via IR on fma and sub expressions | Michael Berg |
| 2018-06-07 | [PowerPC] avoid unprofitable Repl32 flag in BitPermutationSelector | Hiroshi Inoue |
| 2018-06-06 | guard fsqrt with fmf sub flags | Michael Berg |
| 2018-06-05 | guard fneg with fmf sub flags | Michael Berg |
| 2018-06-05 | NFC: adding baseline fneg case for fmf | Michael Berg |
