Age | Commit message (Expand) | Author |
---|---|---|
2017-07-13 | [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16 | Nemanja Ivanovic |
2017-05-24 | P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org... | Zaara Syeda |
2017-01-22 | Fix some broken CHECK lines. | Benjamin Kramer |
2016-11-18 | [Power9] Add patterns for vnegd, vnegw | Ehsan Amiri |
2016-11-15 | vector load store with length (left justified) llvm portion | Zaara Syeda |
2016-11-14 | [PPC] Add intrinsic mapping to the xscvhpsp instruction | Sean Fertile |
2016-11-14 | [PPC] add intrinsics for vec extract exp/significand and vec test data class. | Sean Fertile |
2016-11-11 | [PowerPC] Add remaining vector permute builtins in altivec.h - LLVM portion | Nemanja Ivanovic |
2016-11-01 | [PowerPC] Implement vector shift builtins - llvm portion | Nemanja Ivanovic |
2016-10-26 | [PowerPC] Implement vec_insert_exp builtins - llvm portion | Nemanja Ivanovic |
2016-09-22 | [Power9] Add exploitation of non-permuting memory ops | Nemanja Ivanovic |