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path: root/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
AgeCommit message (Expand)Author
2017-12-22[SelectionDAG] Reverse the order of operands in the ISD::ADD created by Targe...Craig Topper
2017-12-18[PPC] Also disable the pre-emit version of reg+reg to reg+imm transformation.Benjamin Kramer
2017-12-15[PowerPC] Convert r+r instructions to r+i (pre and post RA)Nemanja Ivanovic
2017-01-10DAG: Avoid OOB when legalizing vector indexingMatt Arsenault
2016-08-03Adding -verify-machineinstrs option to PowerPC testsEhsan Amiri
2015-12-10Bitcasts between FP and INT values using direct movesNemanja Ivanovic