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path: root/test/CodeGen/PowerPC/ppcsoftops.ll
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2016-10-02[PowerPC] Refactor soft-float support, and enable PPC64 soft floatHal Finkel
This change enables soft-float for PowerPC64, and also makes soft-float disable all vector instruction sets for both 32-bit and 64-bit modes. This latter part is necessary because the PPC backend canonicalizes many Altivec vector types to floating-point types, and so soft-float breaks scalarization support for many operations. Both for embedded targets and for operating-system kernels desiring soft-float support, it seems reasonable that disabling hardware floating-point also disables vector instructions (embedded targets without hardware floating point support are unlikely to have Altivec, etc. and operating system kernels desiring not to use floating-point registers to lower syscall cost are unlikely to want to use vector registers either). If someone needs this to work, we'll need to change the fact that we promote many Altivec operations to act on v4f32. To make it possible to disable Altivec when soft-float is enabled, hardware floating-point support needs to be expressed as a positive feature, like the others, and not a negative feature, because target features cannot have dependencies on the disabling of some other feature. So +soft-float has now become -hard-float. Fixes PR26970. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283060 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-03Adding -verify-machineinstrs option to PowerPC testsEhsan Amiri
Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277624 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-18[PowerPC] add comment to testStrahinja Petrovic
Added comment in test for soft-float operations on ppc architecture. Test commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266600 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-14[Power PC] llvm soft float support for ppc32Petar Jovanovic
This is the second in a set of patches for soft float support for ppc32, it enables soft float operations. Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D13700 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255516 91177308-0d34-0410-b5e6-96231b3b80d8