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release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
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ppc64-i128-abi.ll
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2017-07-25
[PowerPC] Pretty-print CR bits the way the binutils disassembler does
Nemanja Ivanovic
2017-07-13
[PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16
Nemanja Ivanovic
2017-05-24
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org...
Zaara Syeda
2017-05-02
[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
Nemanja Ivanovic
2016-11-29
Revert https://reviews.llvm.org/rL287679
Nemanja Ivanovic
2016-11-22
[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
Nemanja Ivanovic
2016-10-04
[Power9] Part-word VSX integer scalar loads/stores and sign extend instructions
Nemanja Ivanovic
2016-09-23
[Power9] Exploit move and splat instructions for build_vector improvement
Nemanja Ivanovic
2016-09-22
[Power9] Add exploitation of non-permuting memory ops
Nemanja Ivanovic
2016-08-03
Adding -verify-machineinstrs option to PowerPC tests
Ehsan Amiri
2015-05-25
This patch adds support for the vector quadword add/sub instructions introduced
Kit Barton
2015-05-05
This patch adds ABI support for v1i128 data type.
Kit Barton