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path: root/test/CodeGen/PowerPC/ppc64-i128-abi.ll
AgeCommit message (Expand)Author
2017-07-25[PowerPC] Pretty-print CR bits the way the binutils disassembler doesNemanja Ivanovic
2017-07-13[PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16Nemanja Ivanovic
2017-05-24P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org...Zaara Syeda
2017-05-02[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LENemanja Ivanovic
2016-11-29Revert https://reviews.llvm.org/rL287679Nemanja Ivanovic
2016-11-22[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LENemanja Ivanovic
2016-10-04[Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic
2016-09-23[Power9] Exploit move and splat instructions for build_vector improvementNemanja Ivanovic
2016-09-22[Power9] Add exploitation of non-permuting memory opsNemanja Ivanovic
2016-08-03Adding -verify-machineinstrs option to PowerPC testsEhsan Amiri
2015-05-25This patch adds support for the vector quadword add/sub instructions introducedKit Barton
2015-05-05This patch adds ABI support for v1i128 data type.Kit Barton