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2016-05-04[mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add ↵Zlatko Buljan
tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions Differential Revision: http://reviews.llvm.org/D19857 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268491 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19[Mips] Adjust float ABI settings in case of MIPS16 mode.Simon Atanasyan
Hard float for mips16 means essentially to compile as soft float but to use a runtime library for soft float that is written with native mips32 floating point instructions (those runtime routines run in mips32 hard float mode). The patch reviewed by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08Let rotr and bswap be handled by expansion for Mips16 since we don'tReed Kotler
have native instructions for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192207 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29Change names for MIPS "generic" processors defined in Mips.td to match what GNUAkira Hatanaka
tools use. Patch by Simon Atanasyan. "mips32r1" => "mips32" "4ke" => mips32r2" "mips64r1" => "mips64" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30Remove unnecessary checking of register operands.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140872 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09Add ROTR and ROTRV mips32 instructions. Patch by Akira HatanakaBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121377 91177308-0d34-0410-b5e6-96231b3b80d8
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