| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-15 | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders |
| 2015-04-16 | [opaque pointer type] Add textual IR support for explicit type parameter to t... | David Blaikie |
| 2015-03-13 | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie |
| 2015-02-27 | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie |
| 2012-08-03 | 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. | Akira Hatanaka |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |