| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-05-19 | [mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine ve... | Daniel Sanders |
| 2015-10-15 | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders |
| 2015-07-15 | [SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadol... | Alexey Bataev |
| 2015-02-27 | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie |
| 2013-11-19 | [Mips] Adjust float ABI settings in case of MIPS16 mode. | Simon Atanasyan |
| 2013-07-14 | Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f... | Stephen Lin |
| 2012-12-15 | This code implements most of mips16 hardfloat as it is done by gcc. | Reed Kotler |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |