| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-15 | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders |
| 2015-04-16 | [opaque pointer type] Add textual IR support for explicit type parameter to t... | David Blaikie |
| 2015-03-13 | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie |
| 2013-11-28 | Check in conditional branches for constant islands. Still need to finish | Reed Kotler |
| 2013-10-12 | For Mips16, start to consolidate all forms of 32 bit literal loading so that | Reed Kotler |
| 2012-10-26 | implement large (>16 bit) constant loading. | Reed Kotler |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |