ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2016-07-19	[mips] Correct label prefixes for N32 and N64.	Daniel Sanders
2016-06-24	[mips] Use --check-prefixes where appropriate. NFC.	Daniel Sanders
2016-06-14	[mips][atomics] Fix atomic instruction descriptions and uses.	Simon Dardis
2016-04-28	[mips][atomics] Fix partword atomic binary operation implementation	Simon Dardis
2016-04-11	[mips] Make Static a default relocation model for MIPS codegen	Petar Jovanovic
2016-03-24	CodeGen: extend RHS when splitting ATOMIC_CMP_SWAP_WITH_SUCCESS.	Tim Northover
2016-03-14	[mips] MIPS32R6 compact branch support	Daniel Sanders
2016-03-01	Revert "[mips] Promote the result of SETCC nodes to GPR width."	Vasileios Kalintiris
2016-03-01	[mips] Promote the result of SETCC nodes to GPR width.	Vasileios Kalintiris
2015-05-20	Revert r237789 - [mips] The naming convention for private labels is ABI depe...	Daniel Sanders
2015-05-20	[mips] The naming convention for private labels is ABI dependant.	Daniel Sanders
2015-03-13	[opaque pointer type] Add textual IR support for explicit type parameter to g...	David Blaikie
2015-02-27	[opaque pointer type] Add textual IR support for explicit type parameter to l...	David Blaikie
2014-12-18	[mips][microMIPS] Fix bugs related to atomic SC/LL instructions	Jozef Kolek
2014-11-07	[mips] Promote i32 arguments to i64 for the N32/N64 ABI and fix <64-bit struc...	Daniel Sanders
2014-07-21	Replace the result usages while legalizing cmpxchg.	Logan Chien
2014-06-18	[mips] SYNC $stype instruction was added in Mips32	Matheus Almeida
2014-06-16	[mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.	Daniel Sanders
2014-06-16	[mips] Merge most of the big/little endian checks in atomic.ll	Daniel Sanders
2014-06-13	IR: add "cmpxchg weak" variant to support permitted failure.	Tim Northover
2014-03-11	IR: add a second ordering operand to cmpxhg for failure	Tim Northover
2013-07-26	[mips] Print instructions "beq", "bne" and "or" using assembler pseudo	Akira Hatanaka
2013-07-14	Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...	Stephen Lin
2013-05-31	[mips] Big-endian code generation for atomic instructions.	Akira Hatanaka
2012-11-02	[mips] Fix bug in test case. Disable machine LICM to prevent instruction from	Akira Hatanaka
2012-05-12	Fix test cases.	Akira Hatanaka
2012-05-11	Do not replace operands of pseudo instructions with register $zero.	Akira Hatanaka
2011-09-26	Convert more tests over to the new atomic instructions.	Eli Friedman
2011-09-09	Drop support for Mips1 and Mips2.	Akira Hatanaka
2011-07-19	Lower memory barriers to sync instructions.	Akira Hatanaka
2011-07-19	Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or	Akira Hatanaka
2011-07-19	Remove redundant instructions.	Akira Hatanaka
2011-07-18	Do not treat atomic.load.sub differently than other atomic binary intrinsics.	Akira Hatanaka
2011-07-18	Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from	Akira Hatanaka
2011-05-31	This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,	Bruno Cardoso Lopes