| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-15 | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders |
| 2015-02-27 | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie |
| 2015-02-27 | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie |
| 2013-12-15 | Last change for mips16 prolog/epilog cleanup and optimization. | Reed Kotler |
| 2013-12-10 | Next step in Mips16 prologue/epilogue cleanup. | Reed Kotler |
| 2013-12-08 | Cleaning up of prologue/epilogue code for Mips16. First step | Reed Kotler |
| 2013-08-04 | Add the saving of S2. This is needed for some of the floating point | Reed Kotler |
| 2013-07-13 | Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging.... | Stephen Lin |
| 2013-02-13 | For Mips 16, add the optimization where the 16 bit form of addiu sp can be used | Reed Kotler |
 |
index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |