ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2017-11-30	[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output	Francis Visoiu Mistrih
2017-10-24	MIR: Print the register class or bank in vreg defs	Justin Bogner
2017-05-25	CodeGen: Rename DEBUG_TYPE to match passnames	Matthias Braun
2017-05-09	[lanai] Add computeKnownBitsForTargetNode for Lanai.	Jacques Pienaar
2017-05-09	Add extra operand to CALLSEQ_START to keep frame part set up previously	Serge Pavlov
2016-12-15	[lanai] Simplify small section check in LowerGlobalAddress and treat ldata se...	Jacques Pienaar
2016-12-09	Move .mir tests to appropriate directories	Matthias Braun
2016-12-02	[lanai] Custom lowering of SHL_PARTS	Jacques Pienaar
2016-11-29	[lanai] Manually match 0/-1 with R0/R1.	Jacques Pienaar
2016-07-29	Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag	Eli Bendersky
2016-07-07	[lanai] Use peephole optimizer to generate more conditional ALU operations.	Jacques Pienaar
2016-05-20	[lanai] Change reloc to use PIC_ by default and cleanup.	Jacques Pienaar
2016-04-20	[lanai] Add subword scheduling itineraries.	Jacques Pienaar
2016-04-19	[lanai] Add lowering for SETCCE i32.	Jacques Pienaar
2016-04-14	[lanai] Add custom lowering for SRL_PARTS i32.	Jacques Pienaar
2016-04-14	[lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMem...	Jacques Pienaar
2016-04-05	[lanai] LanaiSetflagAluCombiner more conservative	Jacques Pienaar
2016-03-28	[lanai] Add Lanai backend.	Jacques Pienaar