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path: root/test/CodeGen/ARM/vector-DAGCombine.ll
AgeCommit message (Expand)Author
2017-06-28[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls
2015-09-30[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]la...Jeroen Ketema
2015-02-27[opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie
2015-02-24Added test case for PR22678 (check CONCAT_VECTORS DAG combiner pass doesn't i...Simon Pilgrim
2013-10-11Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun
2013-10-11Tests: Be less dependent on a specific schedule/regallocMatthias Braun
2013-10-10Tests: Use CHECK-LABEL where possibleMatthias Braun
2013-09-17[SelectionDAG] Teach the vector scalarizer about TRUNCATE.Quentin Colombet
2013-07-30[DAGCombiner] insert_vector_elt: Avoid building a vector twice.Quentin Colombet
2013-07-23[ARM][ISel] Improve the lowering of vector loads.Quentin Colombet
2013-07-03[ARM] Improve the instruction selection of vector loads.Quentin Colombet
2013-02-12ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer
2011-11-14ARM VLDR/VSTR instructions don't need a size suffix.Jim Grosbach
2011-10-18Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS.Bob Wilson
2011-04-07Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector...Tanya Lattner
2011-02-14PR9139: Specify ARM/Darwin triple for vector-DAGCombine.ll test.Bob Wilson
2010-12-21Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.Bob Wilson
2010-12-17Fix a DAGCombiner crash when folding binary vector operations with constantBob Wilson
2010-12-17Combine several vector-related DAGCombiner tests.Bob Wilson