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path: root/test/CodeGen/AMDGPU
AgeCommit message (Expand)Author
2017-11-14AMDGPU: Error on stack size overflowMatt Arsenault
2017-11-14CodeGen: Fix TargetLowering::LowerCallTo for sret value typeYaxun Liu
2017-11-14AMDGPU: Fix testMatt Arsenault
2017-11-14AMDGPU: Fix producing saveexec when the copy is spilledMatt Arsenault
2017-11-13AMDGPU: Fix not converting d16 load/stores to offsetMatt Arsenault
2017-11-13AMDGPU: Implement computeKnownBitsForTargetNode for mbcntMatt Arsenault
2017-11-13AMDGPU: Fix multi-use shl/add combineMatt Arsenault
2017-11-13AMDGPU: Select d16 loads into low component of registerMatt Arsenault
2017-11-12AMDGPU: Fix -enable-var-scope violationsMatt Arsenault
2017-11-12AMDGPU: Fix missing gfx9 atomic inc/dec testsMatt Arsenault
2017-11-10[AMDGPU] Prevent Machine Copy Propagation from replacing live copy with the d...Alexander Timofeev
2017-11-10[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environ...Yaxun Liu
2017-11-10[AMDGPU] Fix pointer info for pseudo source for r600Yaxun Liu
2017-11-09AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4Marek Olsak
2017-11-09AMDGPU: Lower buffer store and atomic intrinsics manuallyMarek Olsak
2017-11-09AMDGPU: Merge BUFFER_LOAD_DWORD_OFFSET into x2, x4Marek Olsak
2017-11-09AMDGPU: Merge BUFFER_LOAD_DWORD_OFFEN into x2, x4Marek Olsak
2017-11-09AMDGPU: Merge S_BUFFER_LOAD_DWORD_IMM into x2, x4Marek Olsak
2017-11-09AMDGPU: Fold immediate offset into BUFFER_LOAD_DWORD lowered from SMEMMarek Olsak
2017-11-08AMDGPU: Set correct sched model on v_mad_u64_u32Matt Arsenault
2017-11-06[MIRPrinter] Use %subreg.xxx syntax for subregister index operandsBjorn Pettersson
2017-11-06AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32Matt Arsenault
2017-11-06[AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environmentYaxun Liu
2017-11-06[AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bitYaxun Liu
2017-11-04[AMDGPU] Remove hardcoded address space value from AMDGPULibFuncYaxun Liu
2017-10-31AMDGPU: Select s_buffer_load_dword with a non-constant SGPR offsetMarek Olsak
2017-10-30[AMDGPU] Emit metadata for hidden arguments for kernel enqueueYaxun Liu
2017-10-27AMDGPU/GlobalISel: Mark 32-bit G_FADD as legalTom Stellard
2017-10-27DAG: Fold fma (fneg x), K, y -> fma x, -K, yMatt Arsenault
2017-10-26AMDGPU: Commit missing fence-barrier testKonstantin Zhuravlyov
2017-10-26AMDGPU: Handle s_buffer_load_dword hazard on SIMarek Olsak
2017-10-25Fix CodeGen/AMDGPU/fcanonicalize-elimination.ll on FreeBSD 11.0Alexander Richardson
2017-10-25AMDGPU: Cleanup memory legalizer load/store testsKonstantin Zhuravlyov
2017-10-25AMDGPU/NFC: Rename memory legalizer tests:Konstantin Zhuravlyov
2017-10-25[inlineasm] Fix crash when number of matched input constraint operands overfl...Daniil Fukalov
2017-10-25DAG: Fix creating select with wrong condition typeMatt Arsenault
2017-10-24MIR: Print the register class or bank in vreg defsJustin Bogner
2017-10-24AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)Marek Olsak
2017-10-24AMDGPU: Add llvm.amdgcn.wqm.vote intrinsicMarek Olsak
2017-10-23AMDGPU: Fix default range in non-kernel functionsMatt Arsenault
2017-10-18Canonicalize a large number of mir tests using update_mir_test_checksJustin Bogner
2017-10-18AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistencyKonstantin Zhuravlyov
2017-10-17AMDGPU : Fix an error for the llvm.cttz implementation.Wei Ding
2017-10-17AMDGPU: Start generating metadata for MaxFlatWorkGroupSizeKonstantin Zhuravlyov
2017-10-16Use the return value of UpdateNodeOperands(); in some cases, UpdateNodeOperan...Mark Searles
2017-10-16[AMDGPU] : revert r315908Alexander Timofeev
2017-10-16[AMDGPU] Prevent Machine Copy Propagation from replacing live copy with the d...Alexander Timofeev
2017-10-14AMDGPU: Temporary disable pal metadata check line in llvm-readobj testKonstantin Zhuravlyov
2017-10-14AMDGPU: Bring HSA metadata on par with the specificationKonstantin Zhuravlyov
2017-10-14llvm-readobj: Print AMDGPU note contentsKonstantin Zhuravlyov
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