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ampere-computing/llvm.git
release_60-f1b37feef3d-amp-20180630
release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
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AArch64
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2017-12-18
AArch64: work around how Cyclone handles "movi.2d vD, #0".
Tim Northover
2017-12-15
[CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and d...
Francis Visoiu Mistrih
2017-12-14
[CodeGen] Print global addresses as @foo in both MIR and debug output
Francis Visoiu Mistrih
2017-12-13
Reverted r320229. It broke tests on builder llvm-clang-x86_64-expensive-check...
Galina Kistanova
2017-12-13
[CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and de...
Francis Visoiu Mistrih
2017-12-12
[MachineOperand][MIR] Add isRenamable to MachineOperand.
Geoff Berry
2017-12-11
[GlobalISel] Disable GISel for big endian.
Amara Emerson
2017-12-09
[AArch64] Improve loop unrolling performance on Cavium T99
Joel Jones
2017-12-09
[MachineOutliner] Outline calls
Jessica Paquette
2017-12-08
[AArch64] Avoid SIMD interleaved store instruction for Exynos.
Abderrazek Zaafrani
2017-12-07
[MachineOutliner] Fix offset overflow check
Jessica Paquette
2017-12-07
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
Francis Visoiu Mistrih
2017-12-06
[AArch64] Add patterns to replace fsub fmul with fma fneg.
Florian Hahn
2017-12-06
[ARM][AArch64][DAG] Reenable post-legalize store merge
Nirav Dave
2017-12-05
Revert r319691: [globalisel][tablegen] Split atomic load/store into separate ...
Daniel Sanders
2017-12-04
[globalisel][tablegen] Tests for r319691
Daniel Sanders
2017-12-04
[globalisel][tablegen] Split atomic load/store into separate opcode and enabl...
Daniel Sanders
2017-12-04
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
[AArch64] Allow using emulated tls on platforms other than ELF
Martin Storsjo
2017-12-02
[DAG][AArch64] Disable post-legalization store
Nirav Dave
2017-12-01
[opt-remarks] If hotness threshold is set, ignore remarks without hotness
Adam Nemet
2017-12-01
Revert "[opt-remarks] If hotness threshold is set, ignore remarks without hot...
Adam Nemet
2017-12-01
[opt-remarks] If hotness threshold is set, ignore remarks without hotness
Adam Nemet
2017-12-01
GlobalISel: Enable the legalization of G_MERGE_VALUES and G_UNMERGE_VALUES
Volkan Keles
2017-11-30
[aarch64][globalisel] Legalize G_ATOMIC_CMPXCHG_WITH_SUCCESS and G_ATOMICRMW_*
Daniel Sanders
2017-11-30
[GlobalISel][IRTranslator] Fix crash during translation of zero sized loads/s...
Amara Emerson
2017-11-30
[CodeGen] Always use `printReg` to print registers in both MIR and debug
Francis Visoiu Mistrih
2017-11-30
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
Francis Visoiu Mistrih
2017-11-28
[globalisel][tablegen] Add support for importing G_ATOMIC_CMPXCHG, G_ATOMICRM...
Daniel Sanders
2017-11-28
[aarch64][globalisel] Add missing tests from r319216
Daniel Sanders
2017-11-28
[CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih
2017-11-27
[DAG] Do MergeConsecutiveStores again before Instruction Selection
Nirav Dave
2017-11-21
[AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as *having* side effects.
Chad Rosier
2017-11-20
[AArch64][TableGen] Skip tied result operands for InstAlias
Sander de Smalen
2017-11-18
[AArch64] Map G_LOAD on FPR when the definition goes to a copy to FPR
Quentin Colombet
2017-11-18
[AArch64] Map G_STORE on FPR when the source comes from a FPR copy
Quentin Colombet
2017-11-18
[RegisterBankInfo] Relax the assert of having matching type sizes on default ...
Quentin Colombet
2017-11-18
[AArch64][RegisterBankInfo] Teach instruction mapping about gpr32 -> fpr16 cr...
Quentin Colombet
2017-11-17
[GISel]: DCE copy instructions during legalization
Aditya Nandakumar
2017-11-14
[GISel]: Rework legalization algorithm for better elimination of
Aditya Nandakumar
2017-11-13
[globalisel][tablegen] Add support for extload.
Daniel Sanders
2017-11-13
Fix some misc. -enable-var-scope violations
Matt Arsenault
2017-11-11
[globalisel][tablegen] Import signextload and zeroextload.
Daniel Sanders
2017-11-07
[GlobalISel] Enable legalizing non-power-of-2 sized types.
Kristof Beyls
2017-11-06
[MIRPrinter] Use %subreg.xxx syntax for subregister index operands
Bjorn Pettersson
2017-11-03
[AArch64] Fix the number of iterations for the Newton series
Evandro Menezes
2017-11-03
[AArch64] Use dwarf exception handling on MinGW
Martin Storsjo
2017-11-02
[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
Quentin Colombet
2017-11-02
[AsmPrinterDwarf] Add support for .cfi_restore directive
Francis Visoiu Mistrih
2017-11-01
[globalisel][tablegen] Add support for multi-insn emission
Daniel Sanders
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