Age | Commit message (Expand) | Author |
---|---|---|
2017-10-24 | MIR: Print the register class or bank in vreg defs | Justin Bogner |
2017-05-05 | MIParser/MIRPrinter: Compute block successors if not explicitely specified | Matthias Braun |
2017-02-07 | RegisterCoalescer: Fix joinReservedPhysReg() | Matthias Braun |
2017-01-19 | Use an actual valid register in test | Matthias Braun |
2017-01-13 | Check for register clobbers when merging a vreg live range with a | James Y Knight |
2016-12-01 | RegisterCoalscer: Only coalesce complete reserved registers. | Matthias Braun |