index
:
ampere-computing/llvm.git
release_60-f1b37feef3d-amp-20180630
release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
test
/
CodeGen
/
AArch64
/
fp16-v4-instructions.ll
Age
Commit message (
Expand
)
Author
2017-11-20
[AArch64][TableGen] Skip tied result operands for InstAlias
Sander de Smalen
2017-08-30
[AArch64] allow v4f16 types when FullFP16 is supported
Sjoerd Meijer
2017-02-08
Revert r294437 as it broke an asan buildbot.
Amara Emerson
2017-02-08
[AArch64][TableGen] Skip tied result operands for InstAlias
Amara Emerson
2016-06-16
AArch64: allow MOV (imm) alias to be printed
Tim Northover
2016-05-13
add support for -print-imm-hex for AArch64
Paul Osmialowski
2016-02-23
[AArch64] Generate csinv instruction more often
Geoff Berry
2016-01-22
Do not lower VSETCC if operand is an f16 vector
Pirama Arumuga Nainar
2015-12-10
Fix fptosi, fptoui from f16 vectors to i8, i16 vectors
Pirama Arumuga Nainar
2015-12-08
Define selection for v4f16, v8f16 scalar_to_vector
Pirama Arumuga Nainar
2015-04-23
[AArch64] Handle vec4, vec8, vec16 *itofp for half
Pirama Arumuga Nainar
2015-03-17
Fix bug while building FP16 constant vectors for AArch64
Pirama Arumuga Nainar
2015-02-27
[opaque pointer type] Add textual IR support for explicit type parameter to l...
David Blaikie
2014-08-27
Teach the AArch64 backend about v4f16 and v8f16
Oliver Stannard