| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-11-20 | [AArch64][TableGen] Skip tied result operands for InstAlias | Sander de Smalen |
| 2017-02-08 | Revert r294437 as it broke an asan buildbot. | Amara Emerson |
| 2017-02-08 | [AArch64][TableGen] Skip tied result operands for InstAlias | Amara Emerson |
| 2017-01-10 | [AArch64] Add support for lowering bitreverse to the rbit instruction. | Chad Rosier |
| 2016-07-22 | [SelectionDAG] Optimization of BITREVERSE legalization for power-of-2 integer... | Simon Pilgrim |
| 2016-06-25 | MachineScheduler: Fully compare top/bottom candidates | Matthias Braun |
| 2016-05-13 | add support for -print-imm-hex for AArch64 | Paul Osmialowski |
| 2016-05-12 | [SelectionDAG] Attempt to split BITREVERSE vector legalization into BSWAP and... | Simon Pilgrim |
| 2015-11-13 | [AArch64] Check the expansion of BITREVERSE in regression test | James Molloy |
| 2015-11-13 | [SDAG] Fix expansion of BITREVERSE | James Molloy |
| 2015-11-12 | [SDAG] Introduce a new BITREVERSE node along with a corresponding LLVM intrinsic | James Molloy |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |