| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-08 | [AArch64] Avoid SIMD interleaved store instruction for Exynos. | Abderrazek Zaafrani |
| 2016-07-19 | [AARCH64] Enable AARCH64 lit tests on windows dev machines | Simon Pilgrim |
| 2015-03-14 | Add a bunch of CHECK missing colons in tests. NFC. | Ahmed Bougacha |
| 2015-02-27 | [opaque pointer type] Add textual IR support for explicit type parameter to g... | David Blaikie |
| 2015-01-05 | [AArch64] Improve codegen of store lane instructions by avoiding GPR usage. | Ahmed Bougacha |
| 2015-01-05 | [AArch64] Improve codegen of store lane 0 instructions by directly storing th... | Ahmed Bougacha |
| 2014-05-24 | AArch64/ARM64: move ARM64 into AArch64's place | Tim Northover |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |