ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2018-01-02	[AArch64][GlobalISel] Enable GlobalISel at -O0 by default	Amara Emerson
2015-05-01	[AArch64][FastISel] Variant of the logical instructions that use two input	Quentin Colombet
2015-05-01	[AArch64][FastISel] Fix the setting of kill flags for MUL -> UMULH sequences.	Quentin Colombet
2015-04-30	[AArch64] Fix bad register class constraint in fast-isel for TST instruction.	Quentin Colombet
2015-02-27	[opaque pointer type] Add textual IR support for explicit type parameter to l...	David Blaikie
2015-02-27	[opaque pointer type] Add textual IR support for explicit type parameter to g...	David Blaikie
2015-02-27	Change the fast-isel-abort option from bool to int to enable "levels"	Mehdi Amini
2014-08-27	[FastISel][AArch64] Use the zero register for stores.	Juergen Ributzka
2014-08-21	[FastISel][AArch64] Use the correct register class to make the MI verifier ha...	Juergen Ributzka
2014-08-19	Reapply [FastISel][AArch64] Make use of the zero register when possible (r215...	Juergen Ributzka
2014-08-14	Revert several FastISel commits to track down a buildbot error.	Juergen Ributzka
2014-08-13	[FastISel][AArch64] Make use of the zero register when possible.	Juergen Ributzka
2014-05-24	AArch64/ARM64: move ARM64 into AArch64's place	Tim Northover