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AgeCommit message (Expand)Author
2013-08-02Add a AttributeSetImpl::dump function.Peter Collingbourne
2013-08-02Make one of the AttributeSet ctors maintain the invariant that thePeter Collingbourne
2013-08-02Option parsing: recognize the special -- tokenHans Wennborg
2013-08-02Add a missing 'return' statement.Joey Gouly
2013-08-02[mips] Expand vector truncating stores and extending loads.Akira Hatanaka
2013-08-02[ARMv8] Add an assembler warning for the deprecated 'setend' instruction.Joey Gouly
2013-08-02SLPVectorizer: Fix PR16777. PHInodes may use multiple extracted values that c...Nadav Rotem
2013-08-02Fixes ARM LNT bot from SLP change in O3Renato Golin
2013-08-02Bugfix for making the DWARF debug strings and labels to code emitted as secre...Carlo Kok
2013-08-02Pacify GCC, which worries about falling off the end of the switch.Duncan Sands
2013-08-02Fix dereferencing end iterator in SimplifyCFG. Patch by Ye Mei.Alexey Samsonov
2013-08-02Revert r187597, "Bugfix for making the DWARF debug strings and labels to code...NAKAMURA Takumi
2013-08-02Temporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached toEric Christopher
2013-08-02Teach InstructionSimplify about pointer address spacesMatt Arsenault
2013-08-01[mips] Make load/store accumulator pseudo instructions codeGenOnly. Also,Akira Hatanaka
2013-08-01Teach getOrEnforceKnownAlignment about address spacesMatt Arsenault
2013-08-01Move the optlevel check to the frontend.Nadav Rotem
2013-08-01Use function attributes to indicate that we don't want to realign the stack.Bill Wendling
2013-08-01Fixed the Intel-syntax X86 disassembler to respect the (existing) option for ...Daniel Malea
2013-08-01Fix some issues with Mips16 floating when certain intrinsics are present.Reed Kotler
2013-08-01Debug Info Finder|Verifier: handle DbgLoc attached to instructions.Manman Ren
2013-08-01DebugInfo: Emit definitions for types with no members.David Blaikie
2013-08-01Bugfix for making the DWARF debug strings and labels to code emitted as secre...Carlo Kok
2013-08-01Only enable SLP-vectorization on O3 builds.Nadav Rotem
2013-08-01R600: Add 64-bit float load/store supportTom Stellard
2013-08-01R600: Use 64-bit alignment for 64-bit kernel argumentsTom Stellard
2013-08-01R600/SI: Custom lower i64 ZERO_EXTENDTom Stellard
2013-08-01EVEX and compressed displacement encoding for AVX512Elena Demikhovsky
2013-08-01[SystemZ] Reuse CC results for integer comparisons with zeroRichard Sandiford
2013-08-01[SystemZ] Prefer comparisons with zeroRichard Sandiford
2013-08-01Moving definition of MnemonicContainsDot field from class Instruction to clas...Vladimir Medic
2013-08-01AArch64: add initial NEON supportTim Northover
2013-08-01XCore target: Fix Vararg handlingRobert Lytton
2013-08-01XCore target: Add byval handlingRobert Lytton
2013-08-01Xcore targetRobert Lytton
2013-08-01Fix some misc. issues with Mips16 fp stubs.Reed Kotler
2013-08-01Add an omitted IsCall=1.Reed Kotler
2013-07-31Option parsing: add support for alias arguments.Hans Wennborg
2013-07-3180-colNadav Rotem
2013-07-31Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.Kevin Enderby
2013-07-31Revert "R600: Non vector only instruction can be scheduled on trans unit"Tom Stellard
2013-07-31Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"Tom Stellard
2013-07-31R600: Do not mergevector after a vector reg is usedVincent Lejeune
2013-07-31R600: Avoid more than 4 literals in the same instruction group at schedulingVincent Lejeune
2013-07-31R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune
2013-07-31R600: Don't mix LDS and non-LDS instructions in the same groupVincent Lejeune
2013-07-31R600: Use SchedModel enum for is{Trans,Vector}Only functionsVincent Lejeune
2013-07-31R600: Remove predicated_break instVincent Lejeune
2013-07-31Reject bitcasts between address spaces with different sizesMatt Arsenault
2013-07-31[SystemZ] Implement isLegalAddressingMode()Richard Sandiford
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