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AgeCommit message (Expand)Author
2015-11-27SamplePGO - Add initial support for inliner annotations.Diego Novillo
2015-11-27SamplePGO - Fix default threshold for hot callsites.Diego Novillo
2015-11-27Simplify the linking of recursive data.Rafael Espindola
2015-11-27Follow-up fix for r254201Artyom Skrobov
2015-11-27[ARM] Generate ABI_optimization_goals build attribute, as described in the AR...Artyom Skrobov
2015-11-27[AArch64] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard
2015-11-27[sanitizer] [dfsan] Unify aarch64 mappingAdhemerval Zanella
2015-11-27[SimplifyLibCalls] Use range-based loop. NFC.Davide Italiano
2015-11-27[X86] Pair a NoVLX with HasAVX512 to match the others and remove a unique pre...Craig Topper
2015-11-26MC: Simplify handling of temporary symbols in COFF writer.Peter Collingbourne
2015-11-26[LoopVectorize] Use MapVector rather than DenseMap for MinBWs.Charlie Turner
2015-11-26[X86] Now that X86VPermt2 is used in all the avx512_perm_t_sizes just hardcod...Craig Topper
2015-11-26[X86] Merge X86VPermt2Fp and X86VPermt2Int back together by weakening them ju...Craig Topper
2015-11-26[X86] Split ISD node for Vfpclass and Vfpclasss so that we can write strong t...Craig Topper
2015-11-26Disallow aliases to available_externally.Rafael Espindola
2015-11-26[X86] Revert part of r254167 to recover bots.Craig Topper
2015-11-26[Hexagon] Lowering of V60/HVX vector typesKrzysztof Parzyszek
2015-11-26[X86] Strengthen more type constraints to reduce isel table size.Craig Topper
2015-11-26[Hexagon] Hexagon V60 HVX intrinsic defintionsKrzysztof Parzyszek
2015-11-26[mips][ias] Range check uimm5 operands and fix several bugs this revealed.Daniel Sanders
2015-11-26[AArch64] Add ARMv8.2-A new AT instruction variantsOliver Stannard
2015-11-26ARM: address WOA unsigned division overflow crashMartell Malone
2015-11-26[AArch64] Add ARMv8.2-A UAO PSTATE bitOliver Stannard
2015-11-26[AArch64] Add ARMv8.2-A persistent memory instructionOliver Stannard
2015-11-26[AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 registerOliver Stannard
2015-11-26[AArch64] Add subtarget features for ARMv8.2-AOliver Stannard
2015-11-26[SimplifyLibCalls] Don't depend on a called function having a name, it might ...Benjamin Kramer
2015-11-26[X86] Strengthen more type constraints to reduce isel table size.Craig Topper
2015-11-26X86-FMA3: Improved/enabled the memory folding optimization for scalar loadsVyacheslav Klochkov
2015-11-26[X86] Strengthen the type constraints on X86psadbw and X86dbpsadbw to reduce ...Craig Topper
2015-11-26[Hexagon] HVX vector register classes and more isel patternsKrzysztof Parzyszek
2015-11-26AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsicTom Stellard
2015-11-25[PGO] Implement ValueProfiling Closure interfaces for runtime value profile dataXinliang David Li
2015-11-25[safestack] Fix alignment of dynamic allocas.Evgeniy Stepanov
2015-11-25[WebAssembly] Fix inline asm support for i64 operands.Dan Gohman
2015-11-25[WebAssembly] Fold setne and seteq comparisons into selects.Dan Gohman
2015-11-25[libFuzzer] add a flag -exact_artifact_pathKostya Serebryany
2015-11-25[Hexagon] Treat transfers of FP immediates are pseudo instructionsKrzysztof Parzyszek
2015-11-25[WebAssembly] Add some comments. NFC.Dan Gohman
2015-11-25AMDGPU/SI: select S_ABS_I32 when possible (v2)Marek Olsak
2015-11-25[WebAssembly] Fix WebAssembly register numbering for registers added late.Dan Gohman
2015-11-25[SCCP] More informative message if we don't know how to handle a terminator.Davide Italiano
2015-11-25AMDGPU: Check feature attributes in SIMachineFunctionInfoMatt Arsenault
2015-11-25Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the defaultKrzysztof Parzyszek
2015-11-25AMDGPU: Make v2i64/v2f64 legal types.Matt Arsenault
2015-11-25Expose isXxxConstant() functions from SelectionDAGNodes.h (NFC)Artyom Skrobov
2015-11-25[WebAssembly] Use a physical register to describe ARGUMENT liveness.Dan Gohman
2015-11-25[PGO] Regroup functions in better order (NFC)Xinliang David Li
2015-11-25[WebAssembly] Clean up several FIXME comments.Dan Gohman
2015-11-25[WebAssembly] Support for register stackifying with load and store instructions.Dan Gohman
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