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AgeCommit message (Expand)Author
2018-02-02Merging r323908:Hans Wennborg
2018-02-02Merging r323643:Hans Wennborg
2018-02-02Merging r323909:Hans Wennborg
2018-02-02Merging r323536:Hans Wennborg
2018-02-02Merging r323781:Hans Wennborg
2018-02-02Merging r323857:Hans Wennborg
2018-02-02Merging r323915:Hans Wennborg
2018-02-02Merging r323155:Hans Wennborg
2018-01-31Merging r323810:Hans Wennborg
2018-01-30Merging r323706:Hans Wennborg
2018-01-30Merging r323469:Hans Wennborg
2018-01-30Merging r323672: (test-case re-generated)Hans Wennborg
2018-01-25Merging r323369 and r323371:Hans Wennborg
2018-01-24Merging r323190:Hans Wennborg
2018-01-24Merging r322372 and r322767:Hans Wennborg
2018-01-22Merging r322878:Hans Wennborg
2018-01-19Merging r322053:Hans Wennborg
2018-01-18Merging r322644:Hans Wennborg
2018-01-18Merging r322724:Hans Wennborg
2018-01-17Merging r322106:Hans Wennborg
2018-01-17Merging r322272:Hans Wennborg
2018-01-17Merging r322623:Hans Wennborg
2018-01-03Remove left-over debug printout from r321692Hans Wennborg
2018-01-03[ARM][NFC] Avoid recreating MCSubtargetInfo in ARMAsmBackendAlex Bradbury
2018-01-03[AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.Sander de Smalen
2018-01-03Fix build of WebAssembly and AVR backends after r321692Alex Bradbury
2018-01-03Thread MCSubtargetInfo through Target::createMCAsmBackendAlex Bradbury
2018-01-02Handle the case of live 16-bit subregisters in X86FixupBWInstsAndrew Kaylor
2018-01-02[x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR...Sanjay Patel
2018-01-02[AArch64][GlobalISel] Enable GlobalISel at -O0 by defaultAmara Emerson
2018-01-02[Hexagon] Fix generation of vector sign extensionsKrzysztof Parzyszek
2018-01-02[AArch64][AsmParser] Add isScalarReg() and repurpose isReg()Sander de Smalen
2018-01-02Strip trailing whitespace. NFCISimon Pilgrim
2018-01-02[RISCV] Add Defs Uses information for c.jal and c.addi4spnAlex Bradbury
2018-01-02[RISCV][NFC] Resolve unused variable warning in RISCVISelLoweringAlex Bradbury
2018-01-01[X86] Promote vXi1 fp_to_uint/fp_to_sint to vXi32 to avoid scalarization.Craig Topper
2018-01-01[X86] Replace custom lowering of vXi1 SINT_TO_FP/UINT_TO_FP with promotion.Craig Topper
2018-01-01[SelectionDAG][X86][AArch64] Require targets to specify the promotion type wh...Craig Topper
2018-01-01[X86] In LowerTruncateVecI1, don't add SHL if the input is known to be all si...Craig Topper
2018-01-01[X86] Add missing NoVLX predicate around some patterns that use zmm registers...Craig Topper
2018-01-01[X86] Add patterns for using zmm registers for v8i32/v8f32 vselect with the f...Craig Topper
2017-12-31[X86] Use CONCAT_VECTORS instead of INSERT_SUBVECTOR for padding v4i1/v2i1 ve...Craig Topper
2017-12-31[X86][AVX2] Combine extract(broadcast(scalar_value)) --> scalar_valueSimon Pilgrim
2017-12-31[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)Simon Pilgrim
2017-12-31[X86] Add a DAG combine to widen (i4 (bitcast (v4i1))) before type legalizati...Craig Topper
2017-12-31[X86] Add a DAG combine to fix (v4i1 (bitcast (i4))) before type legalization...Craig Topper
2017-12-31[X86] Prevent combining (v8i1 (bitconvert (i8 load)))->(v8i1 load) if we don'...Craig Topper
2017-12-31[X86] Remove patterns for load/store of vXi with bitcasts to/from integer.Craig Topper
2017-12-31[X86] Remove AND32ri8 from pattern for v1i1 load.Craig Topper
2017-12-31[X86] Fix a crash when returning a <1 x i1> value>Craig Topper