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release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
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X86InstrArithmetic.td
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2017-12-15
[X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that only have...
Craig Topper
2017-10-01
[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem
Craig Topper
2017-09-21
[X86] Remove unused tablegen class.
Craig Topper
2017-09-09
[X86] Don't disable slow INC/DEC if optimizing for size
Craig Topper
2017-08-26
[X86] Qualify the RMW INC/DEC patterns with NotSlowIncDec.
Craig Topper
2017-05-28
[X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen ...
Ayman Musa
2017-04-26
[X86] Add missing mayLoad/mayStore attributes to some X86 instructions (Conti...
Ayman Musa
2016-08-16
[x86] Allow merging multiple instances of an immediate within a basic block f...
Sanjay Patel
2015-10-11
[X86] Fix CMP and TEST with al/ax/eax/rax to not mark EFLAGS as a use or al/a...
Craig Topper
2015-08-11
[X86] Allow merging of immediates within a basic block for code size savings
Michael Kuperstein
2015-03-31
Fix the operand encoding in the test instruction.
Rafael Espindola
2015-01-08
[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LE...
Craig Topper
2015-01-06
[X86] Make isel select the 2-byte register form of INC/DEC even in non-64-bit...
Craig Topper
2015-01-05
[X86] Remove the predicates from the register forms of the 2-byte inc and dec...
Craig Topper
2014-12-29
[X86] Fix some cases where some 8-bit instructions were marked as being conve...
Craig Topper
2014-12-29
[X86] Add the 0x82 instructions to the disassebmler. They are identical in fu...
Craig Topper
2014-12-29
[x86] Refactor some tablegen instruction info classes slightly to prepare for...
Craig Topper
2014-12-29
[x86] Remove unused classes from tablegen instruction info.
Craig Topper
2014-12-18
[X86] Remove unnecessary 'In64BitMode' predicate for instructions that alread...
Craig Topper
2014-12-04
[X86] Clean up whitespace as well as minor coding style
Michael Liao
2014-11-26
Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.
Craig Topper
2014-08-21
[x86] Broadwell: ADOX/ADCX. Added _addcarryx_u{32|64} intrinsics to LLVM.
Robert Khasanov
2014-07-10
[X86] Mark pseudo instruction TEST8ri_NOEREX as hasSIdeEffects=0.
Akira Hatanaka
2014-02-18
Add an x86 prefix encoding for instructions that would decode to a different ...
Craig Topper
2014-02-02
Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...
Craig Topper
2014-01-30
[x86] Fix signed relocations for i64i32imm operands
David Woodhouse
2014-01-17
Switch a few instructions to use RI instead I so they don't require REX_W to ...
Craig Topper
2014-01-15
Add OpSize16 to the two byte forms of INC/DEC that we only use in 64-bit mode...
Craig Topper
2014-01-14
Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ...
Craig Topper
2014-01-08
[x86] Add OpSize16 to instructions that need it
David Woodhouse
2014-01-05
Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode ...
Craig Topper
2014-01-05
Add a new x86 specific instruction flag to force some isCodeGenOnly instructi...
Craig Topper
2013-12-20
[x86] Rename In32BitMode predicate to Not64BitMode
Eric Christopher
2013-10-07
Add disassembler support for long encodings for INC/DEC in 32-bit mode.
Craig Topper
2013-09-13
Adds support for Atom Silvermont (SLM) - -march=slm
Preston Gurd
2013-07-31
Changed register names (and pointer keywords) to be lower case when using Int...
Craig Topper
2013-06-21
Fix IMULX machine model. Multiple def operands require multiple SchedWrites.
Andrew Trick
2013-06-11
Correct the def registers for the 8bit x86 divide instructions to
Eric Christopher
2013-05-29
X86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS.
Ahmed Bougacha
2013-03-26
Annotate the remaining x86 instructions with SchedRW lists.
Jakob Stoklund Olesen
2013-03-20
Annotate remaining IIC_BIN_* instructions.
Jakob Stoklund Olesen
2013-03-18
Annotate X86 arithmetic instructions with SchedRW lists.
Jakob Stoklund Olesen
2013-02-14
added basic support for Intel ADX instructions
Kay Tiong Khoo
2013-02-01
Two changes relevant to LEA and x32:
David Sehr
2013-01-07
Remove # from the beginning and end of def names.
Craig Topper
2013-01-05
Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h...
Craig Topper
2013-01-03
Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe...
Michael Gottesman
2013-01-03
Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi...
Craig Topper
2012-12-27
Mark the divide instructions as hasSideEffects=0.
Craig Topper
2012-12-27
Add hasSideEffects=0 to CMP*rr_REV.
Craig Topper
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