| Age | Commit message (Expand) | Author |
|---|
| 2018-02-02 | Merging r323155: | Hans Wennborg |
| 2017-12-22 | [X86] Improve the printing of address mode during isel matching. | Craig Topper |
| 2017-12-15 | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun |
| 2017-12-13 | Remove redundant includes from lib/Target/X86. | Michael Zolotukhin |
| 2017-12-01 | Revert "[X86] Improvement in CodeGen instruction selection for LEAs." | Matt Morehouse |
| 2017-12-01 | [X86] Improvement in CodeGen instruction selection for LEAs. | Jatin Bhateja |
| 2017-11-23 | [X86] Teach isel that X86ISD::CMPM_RND zeros the upper bits of the mask regis... | Craig Topper |
| 2017-11-22 | [X86] Add an X86ISD::MSCATTER node for consistency with the X86ISD::MGATHER. | Craig Topper |
| 2017-11-13 | [X86] Allow X86ISD::Wrapper to be folded into the base of gather/scatter address | Craig Topper |
| 2017-11-10 | [X86] Merge the template method selectAddrOfGatherScatterNode into selectVect... | Craig Topper |
| 2017-11-08 | [X86] Preserve memory refs when folding loads into divides. | Craig Topper |
| 2017-11-08 | [X86] Remove an if check on the result of a cast. NFC | Craig Topper |
| 2017-11-08 | [X86] Correct the implementation of BEXTR load folding to use the shift as th... | Craig Topper |
| 2017-11-06 | [X86][AVX512] Improve lowering of AVX512 test intrinsics | Uriel Korach |
| 2017-11-06 | [X86] Replace duplicate function call with variable. NFC | Uriel Korach |
| 2017-10-28 | [X86] Fix a mistake in the X86ISelDAGToDAG.cpp code for MUL8r/IMUL8r. | Craig Topper |
| 2017-10-26 | [X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG to support 64... | Craig Topper |
| 2017-10-15 | Reverting r315590; it did not include changes for llvm-tblgen, which is causi... | Aaron Ballman |
| 2017-10-12 | [dump] Remove NDEBUG from test to enable dump methods [NFC] | Don Hinton |
| 2017-10-08 | [X86] Simplify some code in getInsertVINSERTImmediate and getExtractVEXTRACTI... | Craig Topper |
| 2017-10-04 | Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (... | Hans Wennborg |
| 2017-10-04 | [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post... | Jatin Bhateja |
| 2017-09-28 | [X86] Don't select (cmp (and, imm), 0) to testw | Craig Topper |
| 2017-09-28 | [X86] Remove dead code from X86ISelDAGToDAG.cpp multiply handling | Craig Topper |
| 2017-09-25 | [AVX-512] Replace large number of explicit patterns that check for insert_sub... | Craig Topper |
| 2017-09-23 | [X86] Move the getInsertVINSERTImmediate and getExtractVEXTRACTImmediate help... | Craig Topper |
| 2017-09-19 | [X86] Convert X86ISD::SELECT to ISD::VSELECT just before instruction selectio... | Craig Topper |
| 2017-09-18 | [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8bit | Craig Topper |
| 2017-09-18 | [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8... | Craig Topper |
| 2017-09-15 | Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection ... | Hans Wennborg |
| 2017-09-15 | [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs. | Jatin Bhateja |
| 2017-09-13 | [X86] Make sure we emit a SUBREG_TO_REG after the MOV32ri when creating a BEX... | Craig Topper |
| 2017-09-13 | [X86] Use isUInt<32> to simplify some code. NFC | Craig Topper |
| 2017-09-12 | [X86] Move matching of (and (srl/sra, C), (1<<C) - 1) to BEXTR/BEXTRI instruc... | Craig Topper |
| 2017-09-09 | [X86] Call removeDeadNode when we're done doing custom isel for mul, div and ... | Craig Topper |
| 2017-09-09 | [X86] Use ReplaceNode instead of ReplaceUses when converting X86ISD::SHRUNKBL... | Craig Topper |
| 2017-09-08 | [x86] Fix GCC pedantic warnings about default arguments for lambdas. | Chandler Carruth |
| 2017-09-08 | [x86] Flesh out the custom ISel for RMW aritmetic ops with used flags to | Chandler Carruth |
| 2017-09-07 | [x86] Extend the manual ISel of `add` and `sub` with both RMW memory | Chandler Carruth |
| 2017-08-29 | Mark Knights Landing as having slow two memory operand instructions | Craig Topper |
| 2017-08-25 | [x86] Teach the backend to fold more read-modify-write memory operands | Chandler Carruth |
| 2017-08-25 | [X86] Use SDValue::getOpcode instead of calling getNode and calling getOpcode... | Craig Topper |
| 2017-08-25 | [X86] Use isUInt and isShiftedUInt instead of using our own masking and compa... | Craig Topper |
| 2017-08-25 | [x86] NFC: More refactoring to pave the way to extending this ISel logic | Chandler Carruth |
| 2017-08-25 | [x86] NFC - Refactor the custom lowering of `(load; op; store)` RMW sequences. | Chandler Carruth |
| 2017-08-21 | [X86] When selecting sse_load_f32/f64 pattern, make sure there's only one use... | Craig Topper |
| 2017-08-19 | [X86] Merge all of the vecload and alignedload predicates into single predica... | Craig Topper |
| 2017-07-19 | [X86] Don't try to scale down if that exceeds the bitwidth. | Davide Italiano |
| 2017-06-22 | AVX-512: Lowering Masked Gather intrinsic - fixed a bug | Elena Demikhovsky |
| 2017-06-01 | Remove ADDC, ADDE, SUBC, SUBE and SETCCE support from the X86 backend, use th... | Amaury Sechet |
