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path: root/lib/Target/RISCV
AgeCommit message (Expand)Author
2018-01-03Thread MCSubtargetInfo through Target::createMCAsmBackendAlex Bradbury
2018-01-02[RISCV] Add Defs Uses information for c.jal and c.addi4spnAlex Bradbury
2018-01-02[RISCV][NFC] Resolve unused variable warning in RISCVISelLoweringAlex Bradbury
2017-12-15[RISCV] Change shift amount operand of RVC shift instructions to uimmlog2xlen...Alex Bradbury
2017-12-15[RISCV] Enable emission of alias instructions by defaultAlex Bradbury
2017-12-13[RISCV] Define sfence.vma InstAliases to match the GNU RISC-V toolsAlex Bradbury
2017-12-13[RISCV] Implement floating point assembler pseudo instructionsAlex Bradbury
2017-12-13[RISCV][NFC] Update RISCVInstrInfoC.td to match usual instruction naming conv...Alex Bradbury
2017-12-13[RISCV][NFC] Put isSImm6 and simm6 td definition in correct sorted positionAlex Bradbury
2017-12-13[RISCV] MC layer support for the remaining RVC instructionsAlex Bradbury
2017-12-12[RISCV][NFC] Formatting fix in RISCVInstrInfo.tdAlex Bradbury
2017-12-12[RISCV] Implement assembler pseudo instructions for RV32I and RV64IAlex Bradbury
2017-12-12[RISCV] MC layer support for the instructions added in the privileged specAlex Bradbury
2017-12-11[RISCV] Add custom CC_RISCV calling convention and improved call supportAlex Bradbury
2017-12-11[RISCV] Allow lowering of dynamic_stackalloc, stacksave, stackrestoreAlex Bradbury
2017-12-11[RISCV] Implement prolog and epilog insertionAlex Bradbury
2017-12-11[RISCV] Support lowering FrameIndexAlex Bradbury
2017-12-07[RISCV] MC layer support for the jump/branch instructions of the RVC extensionAlex Bradbury
2017-12-07[RISCV] MC layer support for load/store instructions of the C (compressed) ex...Alex Bradbury
2017-12-07[RISCV][NFC] Use TargetRegisterClass::hasSubClassEq in storeRegToStackSlot/lo...Alex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV64D instruction set extensionAlex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV64F instruction set extensionAlex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV64A instruction set extensionAlex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV64M instruction set extensionAlex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV64I instructionsAlex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV32D instruction set extensionAlex Bradbury
2017-12-07[RISCV] MC layer support for the standard RV32F instruction set extensionAlex Bradbury
2017-11-21[RISCV][NFC] Remove unnecessary {} around single statement if blockAlex Bradbury
2017-11-21[RISCV][NFC] Clean up RISCVDAGToDAGISel::SelectAlex Bradbury
2017-11-21[RISCV] Use register X0 (ZERO) for constant 0Alex Bradbury
2017-11-21[RISCV] Support and tests for a variety of additional LLVM IR constructsAlex Bradbury
2017-11-21[RISCV] Implement lowering of ISD::SELECTAlex Bradbury
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie
2017-11-16[RISCV] Fix 64-bit data layout mismatch between backend and target descriptionMandeep Singh Grang
2017-11-16Fix RISCV build after r318352Azharuddin Mohammed
2017-11-10[RISCV] Silence an unused variable warning in release builds [NFC]Mandeep Singh Grang
2017-11-09[RISCV] MC layer support for the standard RV32A instruction set extensionAlex Bradbury
2017-11-09[RISCV] MC layer support for the standard RV32M instruction set extensionAlex Bradbury
2017-11-08[RISCV] Initial support for function callsAlex Bradbury
2017-11-08[RISCV] Codegen for conditional branchesAlex Bradbury
2017-11-08[RISCV] Codegen support for memory operations on global addressesAlex Bradbury
2017-11-08[RISCV] Codegen support for memory operationsAlex Bradbury
2017-11-08[RISCV] Codegen support for materializing constantsAlex Bradbury
2017-11-08[NFCI] Ensure TargetOpcode::* are compatible with guessInstructionProperties=0Alex Bradbury
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie
2017-11-03Move TargetFrameLowering.h to CodeGen where it's implementedDavid Blaikie
2017-10-19[RISCV] Add missing hunk from r316188Alex Bradbury
2017-10-19[RISCV] Initial codegen support for ALU operationsAlex Bradbury
2017-10-19[RISCV] RISCVAsmParser: early exit if RISCVOperand isn't immediate as expectedAlex Bradbury
2017-10-19[RISCV][NFC] Drop unused parameter from createImm helper in RISCVAsmParserAlex Bradbury
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