| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-07 | [RISCV] MC layer support for load/store instructions of the C (compressed) ex... | Alex Bradbury |
| 2017-12-07 | [RISCV] MC layer support for the standard RV32D instruction set extension | Alex Bradbury |
| 2017-12-07 | [RISCV] MC layer support for the standard RV32F instruction set extension | Alex Bradbury |
| 2017-11-17 | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie |
| 2017-11-09 | [RISCV] MC layer support for the standard RV32A instruction set extension | Alex Bradbury |
| 2017-11-09 | [RISCV] MC layer support for the standard RV32M instruction set extension | Alex Bradbury |
| 2017-10-19 | [RISCV] Initial codegen support for ALU operations | Alex Bradbury |
 |
index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |