| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-07 | [RISCV][NFC] Use TargetRegisterClass::hasSubClassEq in storeRegToStackSlot/lo... | Alex Bradbury |
| 2017-11-08 | [RISCV] Initial support for function calls | Alex Bradbury |
| 2017-11-08 | [RISCV] Codegen for conditional branches | Alex Bradbury |
| 2017-11-08 | [RISCV] Codegen support for memory operations | Alex Bradbury |
| 2017-10-19 | [RISCV] Initial codegen support for ALU operations | Alex Bradbury |
 |
index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |