ampere-computing/llvm.git - LLVM including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2018-06-27	[RISCV] Add machine function pass to merge base + offset	Sameer AbuAsal
2018-04-06	[RISCV] Tablegen-driven Instruction Compression.	Sameer AbuAsal
2018-04-04	Sort targetgen calls in lib/Target/*/CMakeLists.	Nico Weber
2018-03-24	[RISCV] Use init_array instead of ctors for RISCV target, by default	Mandeep Singh Grang
2017-12-11	[RISCV] Add custom CC_RISCV calling convention and improved call support	Alex Bradbury
2017-10-19	[RISCV] Initial codegen support for ALU operations	Alex Bradbury
2017-09-17	[RISCV] Add support for disassembly	Alex Bradbury
2017-08-15	[RISCV] Add RISCVInstPrinter and basic MC assembler tests	Alex Bradbury
2017-08-08	[RISCV] Add basic RISCVAsmParser	Alex Bradbury
2016-11-01	[RISCV] Add bare-bones RISC-V MCTargetDesc	Alex Bradbury
2016-11-01	[RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterInfo,}.td	Alex Bradbury
2016-11-01	[RISCV] Add stub backend	Alex Bradbury