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AgeCommit message (Expand)Author
2018-11-30Merging r339260:Tom Stellard
2018-08-16Merging r339769:Hans Wennborg
2018-08-02Merging r338658:Hans Wennborg
2018-07-30[DAGCombiner][TargetLowering] Pass a SmallVector instead of a std::vector to ...Craig Topper
2018-07-30[DAGCombiner][PowerPC][AArch64] Pass Created vector by reference to BuildSDIV...Craig Topper
2018-07-30Remove trailing spaceFangrui Song
2018-07-28DAG: Add calling convention argument to calling convention funcsMatt Arsenault
2018-07-19[Power9] Code Cleanup - Remove needsAggressiveScheduling()Stefan Pintilie
2018-07-18[NFC] fix trivial typos in commentsHiroshi Inoue
2018-07-18Fix build failures from r337347, found by clangJustin Hibbits
2018-07-18Introduce codegen for the Signal Processing EngineJustin Hibbits
2018-07-18Complete the SPE instruction set patternsJustin Hibbits
2018-07-18Add PowerPC e500(v2) core scheduler and directives.Justin Hibbits
2018-07-13[PowerPC] Materialize more constants with CR-field set in late peepholeNemanja Ivanovic
2018-07-11[Power9] Add remaining __flaot128 builtin support for FMA round to oddStefan Pintilie
2018-07-09[Power9] Add __float128 builtins for Rounding OperationsStefan Pintilie
2018-07-09[Power9] [LLVM] Add __float128 support for trunc to double round to oddStefan Pintilie
2018-07-09[Power9] Add __float128 builtins for Round To OddStefan Pintilie
2018-07-09[Power9] Add __float128 support for compare operationsStefan Pintilie
2018-07-06[Power9] Add __float128 library call for fremStefan Pintilie
2018-07-05[Power9] Add lib calls for float128 operations with no equivalent PPC instruc...Lei Huang
2018-07-05[Power9] Optimize codgen for conversions of int to float128Lei Huang
2018-07-05[Power9] Ensure float128 in non-homogenous aggregates are passed via VSX regLei Huang
2018-07-05[Power9]Legalize and emit code for quad-precision convert from single-precisionLei Huang
2018-07-05[Power9] Implement float128 parameter passing and return valuesLei Huang
2018-07-04[Power9]Legalize and emit code for round & convert quad-precision valuesLei Huang
2018-07-04[PowerPC] Replace the Post RA List Scheduler with the Machine SchedulerStefan Pintilie
2018-07-02[PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multip...QingShan Zhang
2018-06-25[PowerPC] Fix incorrectly encoded wait instructionLei Huang
2018-06-19[PowerPC] Fix label address calculation for ppc32Strahinja Petrovic
2018-06-19If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction ...QingShan Zhang
2018-06-15[PowerPC] Add support for high and higha symbol modifiers on tls modifers.Sean Fertile
2018-06-15[PPC64] Support "symbol@high" and "symbol@higha" symbol modifers.Sean Fertile
2018-06-13[PowerPC] fix trivial typos in comment, NFCHiroshi Inoue
2018-06-13[PowerPC] avoid verification failure due to PowerPC VSX Swap Removal passHiroshi Inoue
2018-06-08[NFC] fix formattingHiroshi Inoue
2018-06-07[PowerPC] avoid unprofitable Repl32 flag in BitPermutationSelectorHiroshi Inoue
2018-06-07[PowerPC] fix trivial typos in comment, NFCHiroshi Inoue
2018-06-06[MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixupPeter Smith
2018-06-05[PowerPC] reduce rotate in BitPermutationSelectorHiroshi Inoue
2018-06-04Move Analysis/Utils/Local.h back to TransformsDavid Blaikie
2018-06-01[NFC] Zero initialize local variablesHiroshi Inoue
2018-06-01Set ADDE/ADDC/SUBE/SUBC to expand by defaultAmaury Sechet
2018-05-29[PowerPC] Fix the incorrect iterator inside peepholeLei Huang
2018-05-28[Power9]Legalize and emit code for HW/Byte vector extract and convert to QPLei Huang
2018-05-28[PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/storesZaara Syeda
2018-05-24[PowerPC] Remove the match pattern in the definition of LXSDX/STXSDXLei Huang
2018-05-23[Power9]Legalize and emit code for W vector extract and convert to QPLei Huang
2018-05-23[Power9]Legalize and emit code for DW vector extract and convert to QPLei Huang
2018-05-21MC: Separate creating a generic object writer from creating a target object w...Peter Collingbourne
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