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path: root/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie
This header includes CodeGen headers, and is not, itself, included by any Target headers, so move it into CodeGen to match the layering of its implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317647 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23[NVPTX] Added support for .f16x2 instructions.Artem Belevich
This patch enables support for .f16x2 operations. Added new register type Float16x2. Added support for .f16x2 instructions. Added handling of vectorized loads/stores of v2f16 values. Differential Revision: https://reviews.llvm.org/D30057 Differential Revision: https://reviews.llvm.org/D30310 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-13[NVPTX] Added support for half-precision floating point.Artem Belevich
Only scalar half-precision operations are supported at the moment. - Adds general support for 'half' type in NVPTX. - fp16 math operations are supported on sm_53+ GPUs only (can be disabled with --nvptx-no-f16-math). - Type conversions to/from fp16 are supported on all GPU variants. - On GPU variants that do not have full fp16 support (or if it's disabled), fp16 operations are promoted to fp32 and results are converted back to fp16 for storage. Differential Revision: https://reviews.llvm.org/D28540 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291956 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12[NVPTX] Use untyped (.b) integer registers in PTX.Artem Belevich
This bring LLVM-generated PTX closer to what nvcc generates and avoids triggering issues in ptxas. For instance, ptxas does not accept .s16 (or .u16) registers as operands for .fp16 instructions. Differential Revision: https://reviews.llvm.org/D23460 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278568 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-28MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun
getFrameInfo() never returns nullptr so we should use a reference instead of a pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277017 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko
Apparently, the style needs to be agreed upon first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko
The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11Have getCalleeSavedRegs take a non-null MachineFunction all theEric Christopher
time. The target independent code was passing in one all the time and targets weren't checking validity before using. Update a few calls to pass in a MachineFunction where necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231970 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19Remove all use of is64bit off of NVPTXSubtarget and clean up codeEric Christopher
accordingly. This changes the constructors of a number of classes that don't need to know the subtarget's 64-bitness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-16[NVPTX] Rename registers %fl -> %fd and %rl -> %rdJustin Holewinski
This matches the internal behavior of NVIDIA tools like libnvvm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213168 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30De-virtualize or remove some methods that have no overrides nor override ↵Craig Topper
anything. In some cases remove all together if there are no callers either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-25[C++] Use 'nullptr'. Target edition.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22[Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth
definition below all of the header #include lines, lib/Target/... edition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-04Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is ↵Justin Holewinski
rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185174 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-19Don't pass in the TargetInstrInfo into the register info object. It doesn't ↵Bill Wendling
use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184369 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31[NVPTX] Re-enable support for virtual registers in the final outputJustin Holewinski
Now that 3.3 is branched, we are re-enabling virtual registers to help iron out bugs before the next release. Some of the post-RA passes do not play well with virtual registers, so we disable them for now. The needed functionality of the PrologEpilogInserter pass is copied to a new backend-specific NVPTXPrologEpilog pass. The test for this commit is not breaking the existing tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-30[NVPTX] Run clang-format on all NVPTX sources.Justin Holewinski
Hopefully this resolves any outstanding style issues and gives us an automated way of ensuring we conform to the style guidelines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178415 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky
to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[NVPTX] Disable vector registersJustin Holewinski
Vectors were being manually scalarized by the backend. Instead, let the target-independent code do all of the work. The manual scalarization was from a time before good target-independent support for scalarization in LLVM. However, this forces us to specially-handle vector loads and stores, which we can turn into PTX instructions that produce/consume multiple operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174968 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier
Each target implementation was needlessly recomputing the index. Part of rdar://13076458 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06Round 2 of dead private variable removal.Benjamin Kramer
LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Convert assert(0) to llvm_unreachable.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157380 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-04This patch adds a new NVPTX back-end to LLVM which supports code generation ↵Justin Holewinski
for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
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