| Age | Commit message (Expand) | Author |
|---|
| 2017-11-08 | Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering | David Blaikie |
| 2017-05-09 | Add extra operand to CALLSEQ_START to keep frame part set up previously | Serge Pavlov |
| 2016-09-14 | Finish renaming remaining analyzeBranch functions | Matt Arsenault |
| 2016-09-14 | Make analyzeBranch family of instruction names consistent | Matt Arsenault |
| 2016-09-14 | AArch64: Use TTI branch functions in branch relaxation | Matt Arsenault |
| 2016-07-29 | TargetInstrInfo: add virtual function getInstSizeInBytes | Sjoerd Meijer |
| 2016-07-28 | TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFC | Sjoerd Meijer |
| 2016-07-15 | Rename AnalyzeBranch* to analyzeBranch*. | Jacques Pienaar |
| 2016-07-08 | MSP430: Avoid implicit iterator conversions, NFC | Duncan P. N. Exon Smith |
| 2016-06-12 | Pass DebugLoc and SDLoc by const ref. | Benjamin Kramer |
| 2016-02-23 | CodeGen: TII: Take MachineInstr& in predicate API, NFC | Duncan P. N. Exon Smith |
| 2015-06-23 | Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) | Alexander Kornienko |
| 2015-06-19 | Fixed/added namespace ending comments using clang-tidy. NFC | Alexander Kornienko |
| 2015-06-11 | [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. | Ahmed Bougacha |
| 2014-08-13 | Canonicalize header guards into a common format. | Benjamin Kramer |
| 2014-06-27 | Remove uses and caches of the target machine and subtarget from | Eric Christopher |
| 2014-04-29 | [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final... | Craig Topper |
| 2013-11-19 | [weak vtables] Remove a bunch of weak vtables | Juergen Ributzka |
| 2013-11-18 | Revert r194865 and r194874. | Alexey Samsonov |
| 2013-11-15 | [weak vtables] Remove a bunch of weak vtables | Juergen Ributzka |
| 2012-06-06 | Remove unused private fields found by clang's new -Wunused-private-field. | Benjamin Kramer |
| 2012-03-17 | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2011-07-01 | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng |
| 2010-11-27 | Move callee-saved regs spills / reloads to TFI | Anton Korobeynikov |
| 2010-07-16 | Remove the isMoveInstr() hook. | Jakob Stoklund Olesen |
| 2010-07-11 | Replace copyRegToReg with copyPhysReg for MSP430. | Jakob Stoklund Olesen |
| 2010-06-17 | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings |
| 2010-05-22 | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng |
| 2010-05-06 | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman |
| 2010-05-06 | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng |
| 2010-01-15 | Add branch relaxation pass (shamelessly stolen from PPC). | Anton Korobeynikov |
| 2009-12-05 | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman |
| 2009-10-21 | Implement branch folding | Anton Korobeynikov |
| 2009-10-21 | Cosmetic changes, no functionality changes | Anton Korobeynikov |
| 2009-05-03 | Add InsertBranch() hook for tail mergeing | Anton Korobeynikov |
| 2009-05-03 | Lower select with custom inserted and make condjumps generic | Anton Korobeynikov |
| 2009-05-03 | Add first draft for conditions, conditional branches, etc | Anton Korobeynikov |
| 2009-05-03 | Add code for save/restore of callee-saved registers | Anton Korobeynikov |
| 2009-05-03 | First draft of stack slot loads / stores lowering | Anton Korobeynikov |
| 2009-05-03 | Add code enough for emission of reg-reg and reg-imm moves. This allows us to ... | Anton Korobeynikov |
| 2009-05-03 | Dummy MSP430 backend | Anton Korobeynikov |
