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release_70-e8af9b4c407-amp-20181130
LLVM including Ampere Computing toolchain specific patches
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Hexagon
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HexagonRegisterInfo.cpp
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Author
2017-12-11
[Hexagon] Add support for Hexagon V65
Krzysztof Parzyszek
2017-11-08
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
David Blaikie
2017-10-18
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC)
Sumanth Gundapaneni
2017-09-25
[Hexagon] Make getHexagonSubRegIndex take reference instead of pointer
Krzysztof Parzyszek
2017-09-15
[Hexagon] Switch to parameterized register classes for HVX
Krzysztof Parzyszek
2017-06-23
Revert "[Hexagon] Handle decreasing of stack alignment in frame lowering"
Krzysztof Parzyszek
2017-06-23
[Hexagon] Handle decreasing of stack alignment in frame lowering
Krzysztof Parzyszek
2017-05-26
[Hexagon] Cleanup of unused function isCalleeSaveReg (NFC)
Sumanth Gundapaneni
2017-02-22
[Hexagon] Implement @llvm.readcyclecounter()
Krzysztof Parzyszek
2017-02-17
[Hexagon] Start using regmasks on calls
Krzysztof Parzyszek
2017-02-17
Revert "[Hexagon] Start using regmasks on calls"
Rafael Espindola
2017-02-16
[Hexagon] Start using regmasks on calls
Krzysztof Parzyszek
2017-02-10
[Hexagon] Introduce Hexagon V62
Krzysztof Parzyszek
2017-01-23
[Hexagon] Explicitly reserve aliases of reserved registers
Krzysztof Parzyszek
2016-11-09
[Hexagon] Separate Hexagon subreg indices for different register classes
Krzysztof Parzyszek
2016-08-19
[Hexagon] Improvements to handling and generation of FP instructions
Krzysztof Parzyszek
2016-08-16
[Hexagon] Standardize next batch of pseudo instructions
Krzysztof Parzyszek
2016-06-12
Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.
Benjamin Kramer
2016-05-16
[Hexagon] Make getCallerSavedRegs specific to a register class
Krzysztof Parzyszek
2016-04-18
[NFC] Header cleanup
Mehdi Amini
2016-03-21
[Hexagon] Fix reserving emergency spill slots for register scavenger
Krzysztof Parzyszek
2016-02-18
[Hexagon] Implement TLS support
Krzysztof Parzyszek
2016-02-18
[Hexagon] Update the callee-saved register set for EH-aware functions
Krzysztof Parzyszek
2016-02-12
[Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
Krzysztof Parzyszek
2016-02-12
[Hexagon] Handle out-of-range offsets in eliminateFrameIndex
Krzysztof Parzyszek
2016-01-11
[Hexagon] Mark D14 and GP as reserved registers
Krzysztof Parzyszek
2015-12-18
[Hexagon] Add PIC support
Krzysztof Parzyszek
2015-10-19
[Hexagon] Fix debug information for local objects
Krzysztof Parzyszek
2015-10-17
[Hexagon] Adding skeleton of HVX extension instructions.
Colin LeMahieu
2015-07-20
Targets: commonize some stack realignment code
JF Bastien
2015-07-10
Target RegisterInfo: devirtualize TargetFrameLowering
JF Bastien
2015-04-22
[Hexagon] Overhaul of stack object allocation
Krzysztof Parzyszek
2015-03-12
Remove unused complex patterns for addressing modes on Hexagon.
Krzysztof Parzyszek
2015-03-10
Remove subtarget dependence from HexagonRegisterInfo.
Eric Christopher
2015-02-09
[Hexagon] Removing more V4 predicates since V4 is the required minimum.
Colin LeMahieu
2015-02-05
[Hexagon] Renaming A2_addi and formatting.
Colin LeMahieu
2015-01-15
[Hexagon] Replacing old versions of stores and loads.
Colin LeMahieu
2015-01-14
[Hexagon] Replacing old version of convert and load f64.
Colin LeMahieu
2014-12-29
[Hexagon] Adding post-increment register form stores and register-immediate f...
Colin LeMahieu
2014-12-23
[Hexagon] Adding doubleword load.
Colin LeMahieu
2014-12-23
[Hexagon] Reapplying 224775 load words.
Colin LeMahieu
2014-12-23
Reverting 224775 until mayLoad flag is addressed.
Colin LeMahieu
2014-12-23
[Hexagon] Adding word loads.
Colin LeMahieu
2014-12-23
[Hexagon] Adding signed halfword loads.
Colin LeMahieu
2014-12-23
[Hexagon] Adding unsigned halfword load.
Colin LeMahieu
2014-12-22
[Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
Colin LeMahieu
2014-12-22
[Hexagon] Adding classes and load unsigned byte instruction, updating usages.
Colin LeMahieu
2014-11-18
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
Colin LeMahieu
2014-08-05
Have MachineFunction cache a pointer to the subtarget to make lookups
Eric Christopher
2014-08-04
Remove the TargetMachine forwards for TargetSubtargetInfo based
Eric Christopher
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