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path: root/lib/Target/AMDGPU/VOPInstructions.td
AgeCommit message (Expand)Author
2018-03-26AMDGPU: Introduce common SOP_Pseudo and VOP_Pseudo TableGen base classesNicolai Haehnle
2018-03-16[AMDGPU][MC] Corrected default values for unused SDWA operandsDmitry Preobrazhensky
2018-02-23[MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry
2018-01-30[AMDGPU] isRenamable fixes to support copy forwardingGeoff Berry
2018-01-15[AMDGPU] Copy impdefs from pseudo to real instructionsStanislav Mekhanoshin
2017-11-17[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*Dmitry Preobrazhensky
2017-08-31AMDGPU: Fold clamp modifier for packed instructionsMatt Arsenault
2017-08-30AMDGPU: Correct operand types for v_mad_mix*Matt Arsenault
2017-08-16[AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodesDmitry Preobrazhensky
2017-08-07[AMDGPU] Add pseudo "old" source to all DPP instructionsConnor Abbott
2017-08-07[AMDGPU][MC] Corrected VOP3 version of v_interp_* instructions for VIDmitry Preobrazhensky
2017-07-21[AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifierDmitry Preobrazhensky
2017-07-18[AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if om...Sam Kolton
2017-07-18Revert r308179 which causes tablegen to spam stderr on every build.Chandler Carruth
2017-07-17[AMDGPU] CodeGen: check dst operand type to determine if omod is supported fo...Sam Kolton
2017-07-07[AMDGPU] Assembler: refactor convert methods (VOP3 and MIMG)Sam Kolton
2017-06-22[AMDGPU] SDWA: add support for GFX9 in peephole passSam Kolton
2017-06-21[AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failuresDmitry Preobrazhensky
2017-06-21[AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton
2017-05-23[AMDGPU] SDWA: Add assembler support for GFX9Sam Kolton
2017-03-27[AMDGPU][MC] Fix for Bug 28207 + LIT testsDmitry Preobrazhensky
2017-03-21[ADMGPU] SDWA peephole optimization pass.Sam Kolton
2017-03-03[AMDGPU][MC] Fix for Bug 30829 + LIT testsDmitry Preobrazhensky
2017-02-27AMDGPU: Add VOP3P instruction formatMatt Arsenault
2017-02-22AMDGPU: Fold FP clamp as modifier bitMatt Arsenault
2017-02-10AMDGPU: Fix trailing whitespaceMatt Arsenault
2017-01-20[AMDGPU] Add subtarget features for SDWA/DPPSam Kolton
2016-12-22[AMDGPU] Add pseudo SDWA instructionsSam Kolton
2016-12-22[AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwaSam Kolton
2016-11-18Fix spelling mistakes in AMDGPU target comments. NFC.Simon Pilgrim
2016-11-18AMDGPU: Move redundant setting of inst propertiesMatt Arsenault
2016-09-23[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitionsValery Pykhtin
2016-09-20[AMDGPU] Refactor VOP3 instruction TD definitionsValery Pykhtin
2016-09-19[AMDGPU] Refactor VOPC instruction TD definitionsValery Pykhtin
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