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path: root/lib/Target/AMDGPU/SIRegisterInfo.h
AgeCommit message (Expand)Author
2017-09-29[SystemZ] implement shouldCoalesce()Jonas Paulsson
2017-08-03AMDGPU: Pass special input registers to functionsMatt Arsenault
2017-08-01AMDGPU: Initial implementation of callsMatt Arsenault
2017-06-26AMDGPU: Partially fix implicit.buffer.ptr intrinsic handlingMatt Arsenault
2017-06-08AMDGPU: Use correct register names in inline assemblyMatt Arsenault
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth
2017-06-01AMDGPU: Set high getCSRFirstUseCostMatt Arsenault
2017-05-17AMDGPU: Start defining a calling conventionMatt Arsenault
2017-02-24Revert "Correct register pressure calculation in presence of subregs"Stanislav Mekhanoshin
2017-02-23[AMDGPU] Shut the warning "getRegUnitWeight hides overload...". NFC.Stanislav Mekhanoshin
2017-02-23Correct register pressure calculation in presence of subregsStanislav Mekhanoshin
2017-02-21AMDGPU: Don't use stack space for SGPR->VGPR spillsMatt Arsenault
2017-02-10[AMDGPU] Override PSet for M0Stanislav Mekhanoshin
2017-02-08[AMDGPU] Implement register pressure callbacksStanislav Mekhanoshin
2017-02-08[AMDGPU] Move register related queries to subtarget classKonstantin Zhuravlyov
2017-01-18[AMDGPU] Do not allow register coalescer to create big superregsStanislav Mekhanoshin
2016-12-10AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault
2016-12-09AMDGPU/SI: Don't reserve FLAT_SCR on non-HSA targets & without stack objectsMarek Olsak
2016-12-09AMDGPU/SI: Allow using SGPRs 96-101 on VIMarek Olsak
2016-12-08AMDGPU: Properly implement SIRegisterInfo::isFrameOffsetLegal and needsFrameB...Nicolai Haehnle
2016-11-25AMDGPU/SI: Add back reverted SGPR spilling code, but disable itMarek Olsak
2016-11-25Revert "AMDGPU: Fix MMO when splitting spill"Marek Olsak
2016-11-24TRI: Add hook to pass scavenger during frame eliminationMatt Arsenault
2016-11-23AMDGPU: Fix MMO when splitting spillMatt Arsenault
2016-11-16AMDGPU/SI: Avoid creating unnecessary copies in the SIFixSGPRCopies passTom Stellard
2016-11-07AMDGPU: Refactor copyPhysRegMatt Arsenault
2016-10-26Reapply "AMDGPU: Don't use offen if it is 0"Matt Arsenault
2016-10-04AMDGPU: Factor SGPR spilling into separate functionsMatt Arsenault
2016-10-01Revert "AMDGPU: Don't use offen if it is 0"Mehdi Amini
2016-10-01AMDGPU: Don't use offen if it is 0Matt Arsenault
2016-09-07Remove unnecessary call to getAllocatableRegClassMatt Arsenault
2016-09-06[AMDGPU] Wave and register controlsKonstantin Zhuravlyov
2016-08-29AMDGPU: fix mismatch tags, NFCSaleem Abdulrasool
2016-08-29AMDGPU/SI: Implement a custom MachineSchedStrategyTom Stellard
2016-08-26AMDGPU/SI: Use a better method for determining the largest pressure setsTom Stellard
2016-08-11AMDGPU: Remove custom getSubRegMatt Arsenault
2016-07-28AMDGPU/SI: Don't use reserved VGPRs for SGPR spillingTom Stellard
2016-07-11AMDGPU: Enable trackLivenessAfterRegAllocMatt Arsenault
2016-06-24AMDGPU: Cleanup subtarget handling.Matt Arsenault
2016-06-16AMDGPU/SI: Propagate the Kill flag in storeRegToStackSlot and eliminateFrameI...Changpeng Fang
2016-04-30AMDGPU/SI: Enable the post-ra schedulerTom Stellard
2016-04-16AMDGPU: Enable LocalStackSlotAllocation passMatt Arsenault
2016-04-13AMDGPU/SI: Add support for spilling VGPRs without having to scavenge registersTom Stellard
2016-03-23AMDGPU: Cache information about register pressure setsTom Stellard
2016-03-21AMDGPU: Add SIWholeQuadMode passNicolai Haehnle
2016-03-11AMDGPU: R600 code splitting cleanupMatt Arsenault
2016-03-04AMDGPU/SI: Enable frame index scavenging during PrologEpilogueInserterTom Stellard
2016-02-12AMDGPU: Set flat_scratch from flat_scratch_init regMatt Arsenault
2016-02-11AMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRsTom Stellard
2016-01-13AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle
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