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path: root/lib/Target/AMDGPU/SIFoldOperands.cpp
AgeCommit message (Expand)Author
2018-07-11AMDGPU: Refactor Subtarget classesTom Stellard
2018-06-28AMDGPU: Separate R600 and GCN TableGen filesTom Stellard
2018-05-22AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen
2018-04-30AMDGPU: Add Vega12 and Vega20Matt Arsenault
2018-04-24[AMDGPU] Truncate packed inline constantStanislav Mekhanoshin
2018-04-19[AMDGPU] Use packed literals with zero either lower or hi partStanislav Mekhanoshin
2018-04-17[AMDGPU] Enabled v2.16 literals for VOP3PStanislav Mekhanoshin
2018-03-10AMDGPU: Fix crash when constant folding with physreg operandMatt Arsenault
2018-02-08AMDGPU: Don't crash when trying to fold implicit operandsMatt Arsenault
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun
2017-12-13Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih
2017-11-30[CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih
2017-10-15Remove unused variablesVitaly Buka
2017-10-05AMDGPU: Add comment about clampsMatt Arsenault
2017-10-05AMDGPU: Do not fold clamp instructions when sources are differentMatt Arsenault
2017-09-20AMDGPU: Start selecting v_mad_mixhi_f16Matt Arsenault
2017-08-31AMDGPU: Fold clamp modifier for packed instructionsMatt Arsenault
2017-07-18AMDGPU: Fix crash when folding immediates into multiple usesNicolai Haehnle
2017-07-07[AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim
2017-06-20AMDGPU: Do operand folding in program orderMatt Arsenault
2017-06-20AMDGPU: Preserve undef when folding register operandsMatt Arsenault
2017-06-20AMDGPU: Fix crash with undef vreg input operandMatt Arsenault
2017-06-05[AMDGPU] Fix SIFoldOperands crash with clampStanislav Mekhanoshin
2017-06-03[AMDGPU] Preserve operand order in SIFoldOperandsStanislav Mekhanoshin
2017-05-30[AMDGPU] Allow SDWA in instructions with immediates and SGPRsStanislav Mekhanoshin
2017-03-31[AMDGPU] SDWA Peephole: improve search for immediates in SDWA patternsSam Kolton
2017-03-24[AMDGPU] Fold V_CNDMASK with identical source operandsStanislav Mekhanoshin
2017-02-27AMDGPU: Support v2i16/v2f16 packed operationsMatt Arsenault
2017-02-27AMDGPU: Fold omod into instructionsMatt Arsenault
2017-02-22AMDGPU: Use clamp with f64Matt Arsenault
2017-02-22AMDGPU: Fold FP clamp as modifier bitMatt Arsenault
2017-01-11AMDGPU: Fix folding immediates into mac src2Matt Arsenault
2017-01-10AMDGPU: Constant fold when immediate is materializedMatt Arsenault
2016-12-10AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault
2016-12-07AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.Tom Stellard
2016-11-29AMDGPU: Refactor immediate folding logicMatt Arsenault
2016-11-23AMDGPU: Cleanup immediate folding codeMatt Arsenault
2016-11-23AMDGPU: Fix debug printingMatt Arsenault
2016-11-13[AMDGPU] Add f16 support (VI+)Konstantin Zhuravlyov
2016-10-06AMDGPU: Don't fold undef uses or copies with implicit usesMatt Arsenault
2016-10-06AMDGPU: Remove leftover implicit operands when folding immediatesMatt Arsenault
2016-10-01Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini
2016-09-14AMDGPU: Support folding FrameIndex operandsMatt Arsenault
2016-09-14AMDGPU: Improve splitting 64-bit bit ops by constantsMatt Arsenault
2016-08-15AMDGPU: Don't fold subregister extracts into tied operandsMatt Arsenault
2016-06-30CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith
2016-06-24AMDGPU: Cleanup subtarget handling.Matt Arsenault
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