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path: root/lib/Target/AMDGPU/AMDGPUISelLowering.h
AgeCommit message (Expand)Author
2018-07-20Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Matt Arsenault
2018-07-16[AMDGPU] [AMDGPU] Support a fdot2 pattern.Farhana Aleen
2018-07-14Revert "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Evgeniy Stepanov
2018-07-13AMDGPU: Fix handling of alignment padding in DAG argument loweringMatt Arsenault
2018-07-11AMDGPU: Refactor Subtarget classesTom Stellard
2018-06-28AMDGPU: Separate R600 and GCN TableGen filesTom Stellard
2018-06-28AMDGPU: Remove MFI::ABIArgOffsetMatt Arsenault
2018-06-27[AMDGPU] Convert rcp to rcp_iflagStanislav Mekhanoshin
2018-06-21AMDGPU: Remove old-style image intrinsicsNicolai Haehnle
2018-06-13AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLoweringTom Stellard
2018-06-12[AMDGPU] DAG combine to produce V_PERM_B32Stanislav Mekhanoshin
2018-05-24AMDGPU/R600: Remove code for handling AMDGPUISD::CLAMPTom Stellard
2018-05-22AMDGPU: Move AMDGPUTargetLowering::isFPExtFoldable() into SITargetLoweringTom Stellard
2018-05-16AMDGPU: Custom lower v4i16/v4f16 vector operationsMatt Arsenault
2018-05-09AMDGPU: Add combine for trunc of bitcast from build_vectorMatt Arsenault
2018-05-01Remove \brief commands from doxygen comments.Adrian Prantl
2018-03-05AMDGPU: Fix build warning about overrideMatt Arsenault
2018-03-05Pass Divergence Analysis data to Selection DAG to drive divergenceAlexander Timofeev
2018-01-31AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}Marek Olsak
2018-01-18AMDGPU/SI: Add d16 support for image intrinsics.Changpeng Fang
2018-01-17[AMDGPU] add LDS f32 intrinsicsDaniil Fukalov
2018-01-12AMDGPU/SI: Add d16 support for buffer intrinsics.Changpeng Fang
2017-12-19[AMDGPU] Turn off MergeConsecutiveStores() before Instruction Selection for A...Mark Searles
2017-11-27[AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsicsVedran Miletic
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie
2017-11-09AMDGPU: Lower buffer store and atomic intrinsics manuallyMarek Olsak
2017-11-07AMDGPU: Remove redundant combineMatt Arsenault
2017-11-06AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32Matt Arsenault
2017-10-13AMDGPU: Implement isFPExtFoldableMatt Arsenault
2017-10-12Implement custom lowering for ISD::CTTZ_ZERO_UNDEF and ISD::CTTZ.Wei Ding
2017-08-11AMDGPU: Start adding tail call supportMatt Arsenault
2017-08-03AMDGPU: Don't use report_fatal_error for unsupported call typesMatt Arsenault
2017-08-03AMDGPU: Pass special input registers to functionsMatt Arsenault
2017-07-15AMDGPU: Return correct type during argument loweringMatt Arsenault
2017-06-22[AMDGPU] Add intrinsics for tbuffer load and storeDavid Stuttard
2017-06-19AMDGPU: Cleanup CreateLiveInRegisterMatt Arsenault
2017-05-23[AMDGPU] Convert shl (add) into add (shl)Stanislav Mekhanoshin
2017-05-17AMDGPU: Start defining a calling conventionMatt Arsenault
2017-05-11AMDGPU: Pull fneg out of extract_vector_eltMatt Arsenault
2017-05-01Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.Amara Emerson
2017-04-28AMDGPU: Add new amdgcn.init.exec intrinsicsMarek Olsak
2017-04-28[SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper
2017-04-24CodeGen: Add a hook for getFenceOperandTyYaxun Liu
2017-04-24AMDGPU: Move trap lowering to DAGMatt Arsenault
2017-04-11AMDGPU: Refactor argument loweringMatt Arsenault
2017-04-03AMDGPU: Remove llvm.SI.vs.load.inputMatt Arsenault
2017-04-03AMDGPU: Remove legacy bfe intrinsicsMatt Arsenault
2017-03-31AMDGPU: Remove unnecessary ands when f16 is legalMatt Arsenault
2017-03-31[DAGCombiner] Add vector demanded elements support to ComputeNumSignBitsSimon Pilgrim
2017-03-31[DAGCombiner] Add vector demanded elements support to computeKnownBitsForTarg...Simon Pilgrim
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