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path: root/lib/Target/AArch64
AgeCommit message (Expand)Author
2018-04-17Merging r329761:Tom Stellard
2018-02-26Fix an unused variable warning in non-assert buildsHans Wennborg
2018-02-21[AArch64][GlobalISel] Support G_INSERT/G_EXTRACT of types < s32 bits.Hans Wennborg
2018-02-20Merging r325550:Hans Wennborg
2018-02-20Merging r325463:Hans Wennborg
2018-02-20Merging r324110:Hans Wennborg
2018-01-31Merging r323810:Hans Wennborg
2018-01-25Merging r323369 and r323371:Hans Wennborg
2018-01-22Merging r322878:Hans Wennborg
2018-01-03[AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.Sander de Smalen
2018-01-03Thread MCSubtargetInfo through Target::createMCAsmBackendAlex Bradbury
2018-01-02[AArch64][GlobalISel] Enable GlobalISel at -O0 by defaultAmara Emerson
2018-01-02[AArch64][AsmParser] Add isScalarReg() and repurpose isReg()Sander de Smalen
2018-01-01[SelectionDAG][X86][AArch64] Require targets to specify the promotion type wh...Craig Topper
2017-12-27[AArch64] Change order of candidate FMLS patternsMatthew Simpson
2017-12-22(Re-landing) Expose a TargetMachine::getTargetTransformInfo functionSanjoy Das
2017-12-21Revert "Expose a TargetMachine::getTargetTransformInfo function"Sanjoy Das
2017-12-21Expose a TargetMachine::getTargetTransformInfo functionSanjoy Das
2017-12-20[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2Sander de Smalen
2017-12-20AArch64: fix one more place movi.2d could be created.Tim Northover
2017-12-20[AArch64] Asm: Fix parsing of register aliases that have a name starting with...Sander de Smalen
2017-12-20[AArch64] CCSIDR2 system registerSam Parker
2017-12-20[AArch64] Implement stack probing for windowsMartin Storsjo
2017-12-19Silence a bunch of implicit fallthrough warningsAdrian Prantl
2017-12-18X86/AArch64/ARM: Factor out common sincos_stret logic; NFCIMatthias Braun
2017-12-18AArch64/X86: Factor out common bzero logic; NFCMatthias Braun
2017-12-18[MachineOutliner][NFC] Gardening: use std::any_of instead of bool + loopJessica Paquette
2017-12-18Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turboReid Kleckner
2017-12-18[MachineOutliner] Recommit r320229Jessica Paquette
2017-12-18[AArch64][SVE] Asm: Improve diagnostics further when +sve is not specifiedSander de Smalen
2017-12-18[AArch64][SVE] Asm: Add ZIP1/ZIP2 instructions (predicate/data vectors)Sander de Smalen
2017-12-18[AArch64][SVE] Asm: Add SVE predicate register definitions and parsing supportSander de Smalen
2017-12-18AArch64: work around how Cyclone handles "movi.2d vD, #0".Tim Northover
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun
2017-12-15[AArch64] Fix typo in the ASIMD instruction optimization passEvandro Menezes
2017-12-15[CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and d...Francis Visoiu Mistrih
2017-12-14[AArch64] Test patchEvandro Menezes
2017-12-14TLI: Allow using PSV for intrinsic mem operandsMatt Arsenault
2017-12-14[SimplifyCFG] don't sink common insts too soon (PR34603)Sanjay Patel
2017-12-14DAG: Expose all MMO flags in getTgtMemIntrinsicMatt Arsenault
2017-12-14Re-commit: [TableGen] AsmMatcher: Fix bug with reported diagnostic for operand.Sander de Smalen
2017-12-14Remove redundant includes from lib/Target/AArch64.Fedor Sergeev
2017-12-13Recover some overzealously removed includes.Michael Zolotukhin
2017-12-13Remove redundant includes from lib/Target/AArch64.Michael Zolotukhin
2017-12-13Reverted r320229. It broke tests on builder llvm-clang-x86_64-expensive-check...Galina Kistanova
2017-12-13Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun
2017-12-09[AArch64] Improve loop unrolling performance on Cavium T99Joel Jones
2017-12-09[MachineOutliner] Outline callsJessica Paquette
2017-12-08[AArch64] Rename AArch64VecorByElementOpt.cpp into AArch64SIMDInstrOpt.cpp to...Abderrazek Zaafrani
2017-12-08[AArch64] Avoid SIMD interleaved store instruction for Exynos.Abderrazek Zaafrani
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