Age | Commit message (Expand) | Author |
2018-04-10 | Merging r326769 and r326780: | Tom Stellard |
2018-04-09 | Merging r322319: | Tom Stellard |
2018-02-09 | Merging r321911: | Hans Wennborg |
2018-02-07 | Merging r324422: | Hans Wennborg |
2018-02-05 | Merging r324039: (test case modified to work around r323886 et al.) | Hans Wennborg |
2018-02-05 | Merging r324002: | Hans Wennborg |
2018-02-02 | Merging r323781: | Hans Wennborg |
2018-02-02 | Merging r323857: | Hans Wennborg |
2018-02-02 | Merging r323155: | Hans Wennborg |
2018-01-31 | Merging r323811: | Hans Wennborg |
2018-01-30 | Merging r323710: | Hans Wennborg |
2018-01-30 | Merging r323582: | Hans Wennborg |
2018-01-25 | Merging r323369 and r323371: | Hans Wennborg |
2018-01-24 | Merging r322900 and r323307: | Hans Wennborg |
2018-01-24 | Merging r322372 and r322767: | Hans Wennborg |
2018-01-17 | Merging r322003: | Hans Wennborg |
2018-01-17 | Merging r322313: | Hans Wennborg |
2018-01-17 | Merging r322223: | Hans Wennborg |
2018-01-17 | Merging r321791 and r321862: | Hans Wennborg |
2018-01-17 | Merging r321991: | Hans Wennborg |
2018-01-17 | Merging r322056: | Hans Wennborg |
2018-01-03 | Thread MCSubtargetInfo through Target::createMCAsmBackend | Alex Bradbury |
2018-01-03 | [GlobalISel][Legalizer] Fix legalization of llvm.smul.with.overflow | Amara Emerson |
2018-01-02 | [AArch64][GlobalISel] Fix assert fail with unknown intrinsic. | Amara Emerson |
2018-01-02 | [AArch64][GlobalISel] Enable GlobalISel at -O0 by default | Amara Emerson |
2018-01-02 | Revert r321089: "[DAG] Elide overlapping store" (and subsequent fix in r321204) | Daniel Jasper |
2018-01-02 | [DAGCombine] Fix for PR35765 | Sam Parker |
2018-01-02 | [SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened r... | Craig Topper |
2018-01-02 | [SelectionDAG] Remove ifs on getTypeAction being TypeWidenVector from some of... | Craig Topper |
2018-01-01 | [SelectionDAG][X86][AArch64] Require targets to specify the promotion type wh... | Craig Topper |
2017-12-30 | Use phi ranges to simplify code. No functionality change intended. | Benjamin Kramer |
2017-12-29 | [MachineOperand] Fix LiveDebugVariables code after isRenamable change. | Geoff Berry |
2017-12-28 | Avoid modifying DbgInfo while looping in salvageDebuginfo | Dimitry Andric |
2017-12-28 | [SelectionDAG] Add creating new node debug messages for load, store, gather, ... | Craig Topper |
2017-12-28 | [SelectionDAG] Add some debug print messages to LegalizeVectorOps. | Craig Topper |
2017-12-27 | [DAGCombine] foldBinOpIntoSelect can fail to constant fold in some cases. | Simon Pilgrim |
2017-12-26 | [DAGCombine] visitANDLike - ensure APInt is is in range for getSExtValue/getZ... | Simon Pilgrim |
2017-12-26 | [DAGCombine] Don't combine (and (setne X, 0), (setne X, -1)) --> (setuge (add... | Simon Pilgrim |
2017-12-24 | [DAGCombiners] Don't turn ANDs to shuffles with zero so early. Give some othe... | Craig Topper |
2017-12-23 | [SelectionDAG] Teach SelectionDAG::getNode to constant fold zext/aext/sext of... | Craig Topper |
2017-12-23 | [SelectionDAG][X86] Don't use ->getValueType(0) after a call to getOperand to... | Craig Topper |
2017-12-22 | [DAG] Add missing case check from findbaseoffset merge from r321389. | Nirav Dave |
2017-12-22 | Integrate findBaseOffset address analyses to BaseIndexOffset. NFCI. | Nirav Dave |
2017-12-22 | Revert "[DAG] Integrate findBaseOffset address analyses to BaseIndexOffset. N... | Nirav Dave |
2017-12-22 | (Re-landing) Expose a TargetMachine::getTargetTransformInfo function | Sanjoy Das |
2017-12-22 | [SelectionDAG] Reverse the order of operands in the ISD::ADD created by Targe... | Craig Topper |
2017-12-22 | [DAG] Integrate findBaseOffset address analyses to BaseIndexOffset. NFCI. | Nirav Dave |
2017-12-22 | [DAGCombine] Revert r321259 | Sam Parker |
2017-12-22 | Add hasProfileData() to check if a function has profile data. NFC. | Easwaran Raman |
2017-12-21 | [DAGCombiner] Remove (xor (xor x, c1), c2) -> (xor x, (xor c1, c2)) fold. NFCI. | Simon Pilgrim |