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2017-11-28AMDGPU: Add num spilled s/vgprs to metadataKonstantin Zhuravlyov
This was requested by tools. Differential Revision: https://reviews.llvm.org/D40321 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319192 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-11[AMDGPU] Correct targets that support XNACKTony Tye
Differential Revision: https://reviews.llvm.org/D39887 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317955 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-10[AMDGPU] AMDGPUUsage.rst minor correctionsTony Tye
Differential Revision: https://reviews.llvm.org/D39887 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317924 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-10[AMDGPU] Update code object descriptionTony Tye
- Use ELF header flags to identify processor. - Remove isa note record. - Add target feature section. - Make metadata for NumVGPRs, NumSGPRs and MaxFlatWorkGroupSize required. - Add FixedWorkGroupSize to CodeProps metadata. - Add ReqdWorkGroupSize* to kernel descriptor and move MaxFlatWorkGroupSize to be adjacent. - Move IsXNACKEnabled in the kernel descriptor to be at the end of the unused flags. - Remove IsDynamicCallStack from the metadata and kernel descriptor. - Remove legacy debugger metadata. - Remove old XNACK enabled processor names. Differential Revision: https://reviews.llvm.org/D39828 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317855 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-30[AMDGPU] Emit metadata for hidden arguments for kernel enqueueYaxun Liu
Identifies kernels which performs device side kernel enqueues and emit metadata for the associated hidden kernel arguments. Such kernels are marked with calls-enqueue-kernel function attribute by AMDGPUOpenCLEnqueueKernelLowering pass and later on hidden kernel arguments metadata HiddenDefaultQueue and HiddenCompletionAction are emitted for them. Differential Revision: https://reviews.llvm.org/D39255 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316907 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19AMDGPU/Docs: Fix unreadable charactersKonstantin Zhuravlyov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316171 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18[AMDGPU] Corrections to memory model description.Tony Tye
- Add description on nontemporal support. - Correct OpenCL sequentially consistent and fence code sequences. - Minor test cleanup. Differential Revision: https://reviews.llvm.org/D39073 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316131 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18AMDGPU/Docs: Make target naming consistentKonstantin Zhuravlyov
- R600 Arch: Use Radeon HD XXXX Series - GCN Arch: Use GFXX Differential Revision: https://reviews.llvm.org/D39019 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316100 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistencyKonstantin Zhuravlyov
Differential Revision: https://reviews.llvm.org/D38957 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316097 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-16Add base relative relocation record that can be used for the following case ↵Tony Tye
(OpenCL example): static __global int Var = 0; __global int* Ptr[] = {&Var}; ... In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol. Differential Revision: https://reviews.llvm.org/D38909 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315935 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14AMDGPU: Add AMDGPU HSA Kernel DescriptorKonstantin Zhuravlyov
- Update docs to match llvm coding style - Add missing FP16_OVFL bit for gfx9 - Fix the size of the kernel descriptor in the docs Differential Revision: https://reviews.llvm.org/D38902 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315822 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14AMDGPU: Bring HSA metadata on par with the specificationKonstantin Zhuravlyov
Differential Revision: https://reviews.llvm.org/D38753 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315821 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10[AMDGPU] Lower enqueued blocks and generate runtime metadataYaxun Liu
This patch adds a post-linking pass which replaces the function pointer of enqueued block kernel with a global variable (runtime handle) and adds runtime-handle attribute to the enqueued block kernel. In LLVM CodeGen the runtime-handle metadata will be translated to RuntimeHandle metadata in code object. Runtime allocates a global buffer for each kernel with RuntimeHandel metadata and saves the kernel address required for the AQL packet into the buffer. __enqueue_kernel function in device library knows that the invoke function pointer in the block literal is actually runtime handle and loads the kernel address from it and puts it into AQL packet for dispatching. This cannot be done in FE since FE cannot create a unique global variable with external linkage across LLVM modules. The global variable with internal linkage does not work since optimization passes will try to replace loads of the global variable with its initialization value. Differential Revision: https://reviews.llvm.org/D38610 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315352 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03AMDGPU/Docs: Follow up on review feedback in https://reviews.llvm.org/D38387Konstantin Zhuravlyov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314848 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03AMDGPU: Add ELFOSABI_AMDGPU_MESA3DKonstantin Zhuravlyov
Differential Revision: https://reviews.llvm.org/D38387 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314846 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03AMDGPU: Add ELFOSABI_AMDGPU_PALKonstantin Zhuravlyov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314843 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-15Update AMDGPUUsage.rst documentation:Tony Tye
1. Correct description of the kernel initial state for FLAT_SCRATCH_INIT. 2. Add link to GFX9 architecture documentation. 3. Update product names. 4. Rename note record from NT_AMD_AMDGPU_METADATA to NT_AMD_AMDGPU_HSA_METADATA and move description to the AMDHSA coding convention section. 5. Minor typo corrections. Differential Revision: https://reviews.llvm.org/D36549 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310954 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08AMDGPU: Also remove SI from docsKonstantin Zhuravlyov
Differential Revision: https://reviews.llvm.org/D36424 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310335 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-07Correct GFX9 processor names.Tony Tye
Differential Revision: https://reviews.llvm.org/D33736 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307353 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-26fix various typosSylvestre Ledru
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306262 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08Correct AMDGPU Hawaii and Kabini target namesTony Tye
The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate. Differential Revision: https://reviews.llvm.org/D34016 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304959 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07Try to work around possible bugs in version of Shpinx on buildserver.Tony Tye
Builds sucessfully with Sphinx v1.5.5 Differential Revision: https://reviews.llvm.org/D33736 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304853 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07Add documentation for various aspects of the AMDGPU backend.Tony Tye
Remove extra tabs. Builds sucessfully with Sphinx v1.5.5 Differential Revision: https://reviews.llvm.org/D33736 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304848 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06Add documentation for various aspects of the AMDGPU backend.Tony Tye
Differential Revision: https://reviews.llvm.org/D33736 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304831 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-27Fixing a malformed RST table to get the documentation bot back to green.Aaron Ballman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301545 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-24AMDGPU: Move trap lowering to DAGMatt Arsenault
Fixes traps in any block besides the entry block, and fixes depending on a live-in physical register by using a virtual register copy. Also happens to stop emitting a nop in the case debug trap is not supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301206 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-08[DebugInfo] Emit address space with DW_AT_address_class attribute for ↵Konstantin Zhuravlyov
pointer and reference types Differential Revision: https://reviews.llvm.org/D29670 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-21AMDGPU : AMDGPU : Update AMDGPU Trap Handler ABI.Wei Ding
Differential Revision: http://reviews.llvm.org/D29913 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295745 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-11Correcting several sphinx errors; should fix the LLVM documentation build.Aaron Ballman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294865 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10AMDGPU : Add trap handler support.Wei Ding
Differential Revision: http://reviews.llvm.org/D26010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294692 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14fix some typos in the docSylvestre Ledru
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292014 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-20AMDGPU: Improve documentation.Nikolay Haustov
Summary: Add links to ISA manuals and ABI. Add text about assembler syntax. Add info about instructions operands. Add instruction examples for each encoding. Update directives section, add missing .amdgpu_hsa_kernel. Reviewers: tstellarAMD, SamWot, vpykhtin Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, artem.tamazov, llvm-commits Differential Revision: https://reviews.llvm.org/D24724 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281962 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19This code block breaks the docs build ↵Aaron Ballman
(http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11920/steps/docs-llvm-html/logs/stdio), but I cannot see anything immediately wrong with it and cannot reproduce the diagnostic locally. Setting the code highlighting to none instead of nasm to hopefully get the bot stumbling back towards green. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275998 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-14Speculatively fix the sphinx build, which does not think the original code ↵Aaron Ballman
was valid nasm (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11854/steps/docs-llvm-html/logs/stdio). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275408 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-06AMDGPU: Document address space mappingTom Stellard
Summary: Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in Doxygen comments. This patch adds the description to user guide for AMDGPU back-end. Patch By: Vedran Miletić Reviewers: tstellarAMD, arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17046 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265500 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23fix the indentation of the exampleSylvestre Ledru
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261628 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22docs/AMDGPUUsage: Update assembly exampleTom Stellard
Reviewers: arsenm, nhaustov Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17461 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26AMDGPU/SI: Update amd_kernel_code_t definition and add assembler supportTom Stellard
Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10772 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240839 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26AMDGPU/SI: Add hsa code object directivesTom Stellard
Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10757 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13R600 -> AMDGPU renameTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
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