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AgeCommit message (Expand)Author
2017-12-18[AArch64][SVE] Asm: Improve diagnostics further when +sve is not specifiedSander de Smalen
2017-12-18Reland "[mips] Fix the target specific instruction verifier"Simon Dardis
2017-12-18[Memcpy Loop Lowering] Remove the fixed int8 lowering.Sean Fertile
2017-12-18[TableGen][AsmMatcherEmitter] Only choose specific diagnostic for enabled ins...Sander de Smalen
2017-12-18[LVI] Support for ashr in LVIMax Kazantsev
2017-12-18[ARM GlobalISel] Fix G_(UN)MERGE_VALUES handling after r319524Diana Picus
2017-12-18Constexprify LaneBitmask factory methods.Benjamin Kramer
2017-12-18[ConstantRange] Support for ashr in ConstantRange computationMax Kazantsev
2017-12-18Revert "[mips] Fix the target specific instruction verifier"Simon Dardis
2017-12-18[mips] Fix the target specific instruction verifierSimon Dardis
2017-12-18[AArch64][SVE] Asm: Add ZIP1/ZIP2 instructions (predicate/data vectors)Sander de Smalen
2017-12-18[AArch64][SVE] Asm: Add SVE predicate register definitions and parsing supportSander de Smalen
2017-12-18[ThinLTO] Remove unused codeEugene Leviant
2017-12-18AArch64: work around how Cyclone handles "movi.2d vD, #0".Tim Northover
2017-12-18[TargetLibraryInfo] Discard library functions with incorrectly sized integersIgor Laevsky
2017-12-18[ARM] Adjust test checksSam Parker
2017-12-18[DAGCombine] Move AND nodes to multiple load leavesSam Parker
2017-12-18[NFC][CodeGen][ExpandMemCmp] Fix documentation.Clement Courbet
2017-12-18[X86] Use mattr instead of mcpu in some of the cost model tests.Craig Topper
2017-12-18[SROA] Disable non-whole-alloca splits by defaultHiroshi Inoue
2017-12-18[X86] Fix mistake that I made when splitting up the setOperationAction calls ...Craig Topper
2017-12-18[CGP] Fix the handling select inst in complex addressing modeSerguei Katkov
2017-12-18[x86] add tests for finite libcall lowering (PR35672); NFCSanjay Patel
2017-12-17Re-commit "Properly handle multi-element and dynamically sized allocas in get...Bjorn Steinbrink
2017-12-17[X86] Add test cases that show cases where buildvector of extract and inserts...Craig Topper
2017-12-17[X86] Make the code that creates fmaddsub from build_vector of extracts and i...Craig Topper
2017-12-17[X86] Regenerate truncated rotation tests + add missing 32-bit checksSimon Pilgrim
2017-12-17use uint32_tSam Clegg
2017-12-17[WebAssembly] Export some more info on wasm funtionsSam Clegg
2017-12-17Revert "Properly handle multi-element and dynamically sized allocas in getPoi...Bjorn Steinbrink
2017-12-17Revert "Treat sret arguments as being dereferenceable in getPointerDereferenc...Bjorn Steinbrink
2017-12-17Treat sret arguments as being dereferenceable in getPointerDereferenceableByt...Bjorn Steinbrink
2017-12-17Remove superfluous break after a return. NFCI.Simon Pilgrim
2017-12-17[X86DomainReassignment] Store legal domains in a std::bitset instead of using...Craig Topper
2017-12-17Properly handle byval arguments in getPointerDereferenceableBytes()Bjorn Steinbrink
2017-12-17Properly handle multi-element and dynamically sized allocas in getPointerDere...Bjorn Steinbrink
2017-12-17[X86] Use extract_vector_elt instead of X86ISD::VEXTRACT for isel of vXi1 ext...Craig Topper
2017-12-17[X86] Canonicalize extract_vector_elt from vXi1 to always return MVT::i32.Craig Topper
2017-12-17[X86] Don't create X86ISD::VEXTRACT nodes directly. Use EXTRACT_VECTOR_ELT an...Craig Topper
2017-12-16Fix unused variable warning.Simon Pilgrim
2017-12-16[X86][AVX] lowerVectorShuffleAsBroadcast - aggressively peek through BITCASTsSimon Pilgrim
2017-12-16[X86][AVX] Use extract128BitVector helper. NFCI.Simon Pilgrim
2017-12-16[X86][AVX] Fix failed broadcast foldSimon Pilgrim
2017-12-16[Memcpy Loop Lowering] Only calculate residual size/bytes copied when needed.Sean Fertile
2017-12-16[X86] Don't pass a zero input to the passthru operand of getVectorMaskingNode...Craig Topper
2017-12-16[X86] Have getVectorMaskingNode return an ISD::AND for X86ISD::VPSHUFBITQMB i...Craig Topper
2017-12-16[X86] When using vpopcntdq for ctpop of v8i16 vectors, only promote to v8i32.Craig Topper
2017-12-16[X86] Combine some more scheduler model entries using regular expressions.Craig Topper
2017-12-16[X86] Use instrs instead of instregex for gather/scatter instructions in the ...Craig Topper
2017-12-16[InstCombine] Regenerate FMUL/FMA combine tests with update_test_checks.pySimon Pilgrim
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