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-rw-r--r--test/CodeGen/Lanai/codemodel.ll30
-rw-r--r--test/CodeGen/Lanai/combined_alu_setcc.ll126
-rw-r--r--test/CodeGen/Lanai/comparisons_i32.ll96
-rw-r--r--test/CodeGen/Lanai/constant_multiply.ll107
-rw-r--r--test/CodeGen/Lanai/delay_filler.ll41
-rw-r--r--test/CodeGen/Lanai/i32.ll145
-rw-r--r--test/CodeGen/Lanai/lit.local.cfg3
-rw-r--r--test/CodeGen/Lanai/mem_alu_combiner.ll40
-rw-r--r--test/CodeGen/Lanai/multiply.ll60
-rw-r--r--test/CodeGen/Lanai/select.ll41
-rw-r--r--test/CodeGen/Lanai/set_and_hi.ll15
-rw-r--r--test/CodeGen/Lanai/shift.ll28
-rw-r--r--test/CodeGen/Lanai/stack-frame.ll14
-rw-r--r--test/DebugInfo/Inputs/lanai-processes-relocations.elfbin1144 -> 0 bytes
-rw-r--r--test/DebugInfo/Lanai/processes-relocations.ll10
-rw-r--r--test/MC/Disassembler/Lanai/lit.local.cfg3
-rw-r--r--test/MC/Disassembler/Lanai/v11.txt762
-rw-r--r--test/MC/Lanai/lit.local.cfg3
-rw-r--r--test/MC/Lanai/v11.s830
-rw-r--r--test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml2
20 files changed, 2348 insertions, 8 deletions
diff --git a/test/CodeGen/Lanai/codemodel.ll b/test/CodeGen/Lanai/codemodel.ll
new file mode 100644
index 00000000000..e5ec7265924
--- /dev/null
+++ b/test/CodeGen/Lanai/codemodel.ll
@@ -0,0 +1,30 @@
+; RUN: llc -march=lanai < %s | FileCheck %s
+; RUN: llc -march=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
+
+@data = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
+
+define i32 @foo() nounwind readonly {
+entry:
+; CHECK-SMALL-LABEL: foo:
+; CHECK-SMALL: ld [data], %rv
+; CHECK-LABEL: foo:
+; CHECK: mov hi(data), %r[[REGISTER:[0-9]+]]
+; CHECK: or %r[[REGISTER]], lo(data), %r[[REGISTER]]
+; CHECK: ld 0[%r[[REGISTER]]], %rv
+ %0 = load i32, i32* getelementptr ([0 x i32], [0 x i32]* @data, i64 0, i64 0), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define i32 @foo1() nounwind readonly {
+entry:
+; CHECK-SMALL-LABEL: foo1:
+; CHECK-SMALL: mov data, %r[[REGISTER:[0-9]+]]
+; CHECK-SMALL: ld 40[%r[[REGISTER]]], %rv
+; CHECK-LABEL: foo1:
+; CHECK: mov hi(data), %r[[REGISTER:[0-9]+]]
+; CHECK: or %r[[REGISTER]], lo(data), %r[[REGISTER]]
+; CHECK: ld 40[%r[[REGISTER]]], %rv
+ %0 = load i32, i32* getelementptr ([0 x i32], [0 x i32]* @data, i32 0, i64 10), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
diff --git a/test/CodeGen/Lanai/combined_alu_setcc.ll b/test/CodeGen/Lanai/combined_alu_setcc.ll
new file mode 100644
index 00000000000..5f035b20fa1
--- /dev/null
+++ b/test/CodeGen/Lanai/combined_alu_setcc.ll
@@ -0,0 +1,126 @@
+; RUN: llc < %s -march=lanai | FileCheck %s
+
+; Test the alu setcc combiner.
+
+; TODO: Enhance combiner to handle this case. This expands into:
+; sub %r7, %r6, %r3
+; sub.f %r7, %r6, %r0
+; sel.eq %r18, %r3, %rv
+; This is different from the pattern currently matched. If the lowered form had
+; been sub.f %r3, 0, %r0 then it would have matched.
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test0a(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %sub = sub i32 %b, %a
+ %cmp = icmp eq i32 %sub, 0
+ %cond = select i1 %cmp, i32 %c, i32 %sub
+ ret i32 %cond
+}
+; CHECK-LABEL: test0a
+; CHECK: sub.f %r7
+; CHECK: sel.eq
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test0b(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %cmp = icmp eq i32 %b, %a
+ %cond = select i1 %cmp, i32 %c, i32 %b
+ ret i32 %cond
+}
+; CHECK-LABEL: test0b
+; CHECK: sub.f %r7, %r6, %r0
+; CHECK-NEXT: sel.eq
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test1a(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %sub = sub i32 %b, %a
+ %cmp = icmp slt i32 %sub, 0
+ %cond = select i1 %cmp, i32 %c, i32 %d
+ ret i32 %cond
+}
+; CHECK-LABEL: test1a
+; CHECK: sub.f %r7, %r6
+; CHECK-NEXT: sel.mi
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test1b(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %sub = sub i32 %b, %a
+ %cmp = icmp slt i32 %sub, 0
+ %cond = select i1 %cmp, i32 %c, i32 %d
+ ret i32 %cond
+}
+; CHECK-LABEL: test1b
+; CHECK: sub.f %r7, %r6
+; CHECK-NEXT: sel.mi
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test2a(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %sub = sub i32 %b, %a
+ %cmp = icmp sgt i32 %sub, -1
+ %cond = select i1 %cmp, i32 %c, i32 %d
+ ret i32 %cond
+}
+; CHECK-LABEL: test2a
+; CHECK: sub.f %r7, %r6
+; CHECK: sel.pl
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test2b(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %sub = sub i32 %b, %a
+ %cmp = icmp sgt i32 %sub, -1
+ %cond = select i1 %cmp, i32 %c, i32 %d
+ ret i32 %cond
+}
+; CHECK-LABEL: test2b
+; CHECK: sub.f %r7, %r6
+; CHECK: sel.pl
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test3(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %sub = sub i32 %b, %a
+ %cmp = icmp slt i32 %sub, 1
+ %cond = select i1 %cmp, i32 %c, i32 %d
+ ret i32 %cond
+}
+
+; Function Attrs: norecurse nounwind readnone
+define i32 @test4(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) #0 {
+entry:
+ %cmp = icmp ne i32 %a, 0
+ %cmp1 = icmp ult i32 %a, %b
+ %or.cond = and i1 %cmp, %cmp1
+ br i1 %or.cond, label %return, label %if.end
+
+if.end: ; preds = %entry
+ %cmp2 = icmp ne i32 %b, 0
+ %cmp4 = icmp ult i32 %b, %c
+ %or.cond29 = and i1 %cmp2, %cmp4
+ br i1 %or.cond29, label %return, label %if.end6
+
+if.end6: ; preds = %if.end
+ %cmp7 = icmp ne i32 %c, 0
+ %cmp9 = icmp ult i32 %c, %d
+ %or.cond30 = and i1 %cmp7, %cmp9
+ br i1 %or.cond30, label %return, label %if.end11
+
+if.end11: ; preds = %if.end6
+ %cmp12 = icmp ne i32 %d, 0
+ %cmp14 = icmp ult i32 %d, %a
+ %or.cond31 = and i1 %cmp12, %cmp14
+ %b. = select i1 %or.cond31, i32 %b, i32 21
+ ret i32 %b.
+
+return: ; preds = %if.end6, %if.end, %entry
+ %retval.0 = phi i32 [ %c, %entry ], [ %d, %if.end ], [ %a, %if.end6 ]
+ ret i32 %retval.0
+}
+; CHECK-LABEL: test4
+; CHECK: and.f
+; CHECK: and.f
+; CHECK: and.f
diff --git a/test/CodeGen/Lanai/comparisons_i32.ll b/test/CodeGen/Lanai/comparisons_i32.ll
new file mode 100644
index 00000000000..fd8ca725c4c
--- /dev/null
+++ b/test/CodeGen/Lanai/comparisons_i32.ll
@@ -0,0 +1,96 @@
+; RUN: llc < %s | FileCheck %s
+
+; Test that basic 32-bit integer comparison operations assemble as expected.
+
+target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+target triple = "lanai"
+
+; CHECK-LABEL: eq_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: seq
+define i32 @eq_i32(i32 %x, i32 %y) {
+ %a = icmp eq i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ne_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sne
+define i32 @ne_i32(i32 %x, i32 %y) {
+ %a = icmp ne i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: slt_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: slt
+define i32 @slt_i32(i32 %x, i32 %y) {
+ %a = icmp slt i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sle_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sle
+define i32 @sle_i32(i32 %x, i32 %y) {
+ %a = icmp sle i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ult_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sult
+define i32 @ult_i32(i32 %x, i32 %y) {
+ %a = icmp ult i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ule_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sule
+define i32 @ule_i32(i32 %x, i32 %y) {
+ %a = icmp ule i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sgt_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sgt
+define i32 @sgt_i32(i32 %x, i32 %y) {
+ %a = icmp sgt i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: sge_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sge
+define i32 @sge_i32(i32 %x, i32 %y) {
+ %a = icmp sge i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: ugt_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: sugt
+define i32 @ugt_i32(i32 %x, i32 %y) {
+ %a = icmp ugt i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+; CHECK-LABEL: uge_i32:
+; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
+; CHECK-NEXT: suge
+define i32 @uge_i32(i32 %x, i32 %y) {
+ %a = icmp uge i32 %x, %y
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
diff --git a/test/CodeGen/Lanai/constant_multiply.ll b/test/CodeGen/Lanai/constant_multiply.ll
new file mode 100644
index 00000000000..77c9805e441
--- /dev/null
+++ b/test/CodeGen/Lanai/constant_multiply.ll
@@ -0,0 +1,107 @@
+; RUN: llc < %s | FileCheck %s
+
+; Test custom lowering for 32-bit integer multiplication.
+
+target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+target triple = "lanai"
+
+; CHECK-LABEL: f6:
+; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @f6(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, 6
+ ret i32 %1
+}
+
+; CHECK-LABEL: f7:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r6, %rv
+define i32 @f7(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, 7
+ ret i32 %1
+}
+
+; CHECK-LABEL: f8:
+; CHECK: sh %r6, 0x3, %rv
+define i32 @f8(i32 inreg %a) #0 {
+ %1 = shl nsw i32 %a, 3
+ ret i32 %1
+}
+
+; CHECK-LABEL: f9:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: add %r{{[0-9]+}}, %r6, %rv
+define i32 @f9(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, 9
+ ret i32 %1
+}
+
+; CHECK-LABEL: f10:
+; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: add %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @f10(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, 10
+ ret i32 %1
+}
+
+; CHECK-LABEL: f1280:
+; CHECK: sh %r6, 0x8, %r{{[0-9]+}}
+; CHECK: sh %r6, 0xa, %r{{[0-9]+}}
+; CHECK: add %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @f1280(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, 1280
+ ret i32 %1
+}
+
+; CHECK-LABEL: fm6:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @fm6(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, -6
+ ret i32 %1
+}
+
+; CHECK-LABEL: fm7:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r6, %r{{[0-9]+}}, %rv
+define i32 @fm7(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, -7
+ ret i32 %1
+}
+
+; CHECK-LABEL: fm8:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @fm8(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, -8
+ ret i32 %1
+}
+
+; CHECK-LABEL: fm9:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r6, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @fm9(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, -9
+ ret i32 %1
+}
+
+; CHECK-LABEL: fm10:
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @fm10(i32 inreg %a) #0 {
+ %1 = mul nsw i32 %a, -10
+ ret i32 %1
+}
+
+; CHECK-LABEL: h1:
+; CHECK: __mulsi3
+define i32 @h1(i32 inreg %a) #0 {
+ %1 = mul i32 %a, -1431655765
+ ret i32 %1
+}
diff --git a/test/CodeGen/Lanai/delay_filler.ll b/test/CodeGen/Lanai/delay_filler.ll
new file mode 100644
index 00000000000..bb74276d46d
--- /dev/null
+++ b/test/CodeGen/Lanai/delay_filler.ll
@@ -0,0 +1,41 @@
+; RUN: llc -march=lanai < %s | FileCheck %s
+; RUN: llc -march=lanai --lanai-nop-delay-filler < %s | \
+; RUN: FileCheck %s --check-prefix=NOP
+
+; CHECK: bt f
+; CHECK-NEXT: or
+; NOP: bt f
+; NOP-NEXT: nop
+
+; ModuleID = 'delay_filler.c'
+target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+target triple = "lanai"
+
+; Function Attrs: nounwind
+define i32 @g(i32 inreg %n) #0 {
+entry:
+ %cmp5 = icmp sgt i32 %n, 0
+ br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.cond.cleanup.loopexit: ; preds = %for.body
+ %call.lcssa = phi i32 [ %call, %for.body ]
+ br label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
+ %a.0.lcssa = phi i32 [ undef, %entry ], [ %call.lcssa, %for.cond.cleanup.loopexit ]
+ ret i32 %a.0.lcssa
+
+for.body: ; preds = %for.body.preheader, %for.body
+ %i.07 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %a.06 = phi i32 [ %call, %for.body ], [ undef, %for.body.preheader ]
+ %call = tail call i32 @f(i32 inreg %a.06) #2
+ %inc = add nuw nsw i32 %i.07, 1
+ %exitcond = icmp eq i32 %inc, %n
+ br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
+}
+
+declare i32 @f(i32 inreg) #1
+
diff --git a/test/CodeGen/Lanai/i32.ll b/test/CodeGen/Lanai/i32.ll
new file mode 100644
index 00000000000..632cc467d68
--- /dev/null
+++ b/test/CodeGen/Lanai/i32.ll
@@ -0,0 +1,145 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 32-bit integer operations assemble as expected.
+
+target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+target triple = "lanai"
+
+; Function Attrs: nounwind readnone
+declare i32 @llvm.ctpop.i32(i32) #1
+
+; Function Attrs: nounwind readnone
+declare i32 @llvm.ctlz.i32(i32, i1) #1
+
+; Function Attrs: nounwind readnone
+declare i32 @llvm.cttz.i32(i32, i1) #1
+
+; CHECK-LABEL: add32:
+; CHECK: add %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @add32(i32 %x, i32 %y) {
+ %a = add i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: sub32:
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @sub32(i32 %x, i32 %y) {
+ %a = sub i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: mul32:
+; CHECK: bt __mulsi3
+define i32 @mul32(i32 %x, i32 %y) {
+ %a = mul i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: sdiv32:
+; CHECK: bt __divsi3
+define i32 @sdiv32(i32 %x, i32 %y) {
+ %a = sdiv i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: udiv32:
+; CHECK: bt __udivsi3
+define i32 @udiv32(i32 %x, i32 %y) {
+ %a = udiv i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: srem32:
+; CHECK: bt __modsi3
+define i32 @srem32(i32 %x, i32 %y) {
+ %a = srem i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: urem32:
+; CHECK: bt __umodsi3
+define i32 @urem32(i32 %x, i32 %y) {
+ %a = urem i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: and32:
+; CHECK: and %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @and32(i32 %x, i32 %y) {
+ %a = and i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: or32:
+; CHECK: or %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @or32(i32 %x, i32 %y) {
+ %a = or i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: xor32:
+; CHECK: xor %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @xor32(i32 %x, i32 %y) {
+ %a = xor i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: shl32:
+; CHECK: sh %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @shl32(i32 %x, i32 %y) {
+ %a = shl i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: shr32:
+; CHECK: sub %r0, %r{{[0-9]+}}, %r{{[0-9]+}}
+; CHECK: sh %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @shr32(i32 %x, i32 %y) {
+ %a = lshr i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: sar32
+; CHECK: sub %r0, %r{{[0-9]+}}, %r{{[0-9]+}}
+; CHECK: sha %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+define i32 @sar32(i32 %x, i32 %y) {
+ %a = ashr i32 %x, %y
+ ret i32 %a
+}
+
+; CHECK-LABEL: clz32:
+; CHECK: leadz %r{{[0-9]+}}, %rv
+define i32 @clz32(i32 %x) {
+ %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+ ret i32 %a
+}
+
+; CHECK-LABEL: clz32_zero_undef:
+; CHECK-NOT: sub.f
+; CHECK: leadz %r{{[0-9]+}}, %rv
+define i32 @clz32_zero_undef(i32 %x) {
+ %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ ret i32 %a
+}
+
+; CHECK-LABEL: ctz32:
+; CHECK: trailz %r{{[0-9]+}}, %rv
+define i32 @ctz32(i32 %x) {
+ %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
+ ret i32 %a
+}
+
+; CHECK-LABEL: ctz32_zero_undef:
+; CHECK-NOT: sub.f
+; CHECK: trailz %r{{[0-9]+}}, %rv
+define i32 @ctz32_zero_undef(i32 %x) {
+ %a = call i32 @llvm.cttz.i32(i32 %x, i1 true)
+ ret i32 %a
+}
+
+; CHECK-LABEL: popcnt32:
+; CHECK: popc %r{{[0-9]+}}, %rv
+define i32 @popcnt32(i32 %x) {
+ %a = call i32 @llvm.ctpop.i32(i32 %x)
+ ret i32 %a
+}
diff --git a/test/CodeGen/Lanai/lit.local.cfg b/test/CodeGen/Lanai/lit.local.cfg
new file mode 100644
index 00000000000..3f30d055364
--- /dev/null
+++ b/test/CodeGen/Lanai/lit.local.cfg
@@ -0,0 +1,3 @@
+if not 'Lanai' in config.root.targets:
+ config.unsupported = True
+
diff --git a/test/CodeGen/Lanai/mem_alu_combiner.ll b/test/CodeGen/Lanai/mem_alu_combiner.ll
new file mode 100644
index 00000000000..087ea1cc146
--- /dev/null
+++ b/test/CodeGen/Lanai/mem_alu_combiner.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=lanai | FileCheck %s
+; RUN: llc < %s -march=lanai -disable-lanai-mem-alu-combiner | \
+; RUN: FileCheck %s -check-prefix=CHECK-DIS
+
+; CHECK-LABEL: sum,
+; CHECK: ++],
+; CHECK-DIS-LABEL: sum,
+; CHECK-DIS-NOT: ++],
+
+define i32 @sum(i32* inreg nocapture readonly %data, i32 inreg %n) #0 {
+entry:
+ %cmp6 = icmp sgt i32 %n, 0
+ br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.cond.cleanup.loopexit: ; preds = %for.body
+ %add.lcssa = phi i32 [ %add, %for.body ]
+ br label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
+ %sum_.0.lcssa = phi i32 [ 0, %entry ], [ %add.lcssa, %for.cond.cleanup.loopexit ]
+ ret i32 %sum_.0.lcssa
+
+for.body: ; preds = %for.body.preheader, %for.body
+ %i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %sum_.07 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx = getelementptr inbounds i32, i32* %data, i32 %i.08
+ %0 = load i32, i32* %arrayidx, align 4, !tbaa !0
+ %add = add nsw i32 %0, %sum_.07
+ %inc = add nuw nsw i32 %i.08, 1
+ %exitcond = icmp eq i32 %inc, %n
+ br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
+}
+
+!0 = !{!1, !1, i64 0}
+!1 = !{!"int", !2, i64 0}
+!2 = !{!"omnipotent char", !3, i64 0}
+!3 = !{!"Simple C/C++ TBAA"}
diff --git a/test/CodeGen/Lanai/multiply.ll b/test/CodeGen/Lanai/multiply.ll
new file mode 100644
index 00000000000..c92a06c3f01
--- /dev/null
+++ b/test/CodeGen/Lanai/multiply.ll
@@ -0,0 +1,60 @@
+; RUN: llc -march=lanai < %s | FileCheck %s
+
+; Test the in place lowering of mul i32.
+
+define i32 @f6(i32 inreg %a) #0 {
+entry:
+ %mul = mul nsw i32 %a, 6
+ ret i32 %mul
+}
+; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+
+define i32 @f7(i32 inreg %a) #0 {
+entry:
+ %mul = mul nsw i32 %a, 7
+ ret i32 %mul
+}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r6, %rv
+
+define i32 @f8(i32 inreg %a) #0 {
+entry:
+ %mul = shl nsw i32 %a, 3
+ ret i32 %mul
+}
+; CHECK: sh %r6, 0x3, %rv
+
+define i32 @fm6(i32 inreg %a) #0 {
+entry:
+ %mul = mul nsw i32 %a, -6
+ ret i32 %mul
+}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+
+define i32 @fm7(i32 inreg %a) #0 {
+entry:
+ %mul = mul nsw i32 %a, -7
+ ret i32 %mul
+}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r6, %r{{[0-9]+}}, %rv
+
+define i32 @fm8(i32 inreg %a) #0 {
+entry:
+ %mul = mul nsw i32 %a, -8
+ ret i32 %mul
+}
+; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
+; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
+
+define i32 @h1(i32 inreg %a) #0 {
+entry:
+ %mul = mul i32 %a, -1431655765
+ ret i32 %mul
+}
+; CHECK: h1
+; CHECK: mulsi3
diff --git a/test/CodeGen/Lanai/select.ll b/test/CodeGen/Lanai/select.ll
new file mode 100644
index 00000000000..159e8edb283
--- /dev/null
+++ b/test/CodeGen/Lanai/select.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s | FileCheck %s
+
+; Test that Lanai select instruction is selected from LLVM select instruction.
+
+target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+target triple = "lanai"
+
+; CHECK-LABEL: select_i32_bool:
+; CHECK: sub.f %r6, 0x0, %r0
+; CHECK: sel.ne %r7, %r18, %rv
+define i32 @select_i32_bool(i1 inreg %a, i32 inreg %b, i32 inreg %c) {
+ %cond = select i1 %a, i32 %b, i32 %c
+ ret i32 %cond
+}
+
+; CHECK-LABEL: select_i32_eq:
+; CHECK: sub.f %r6, 0x0, %r0
+; CHECK: sel.eq %r7, %r18, %rv
+define i32 @select_i32_eq(i32 inreg %a, i32 inreg %b, i32 inreg %c) {
+ %cmp = icmp eq i32 %a, 0
+ %cond = select i1 %cmp, i32 %b, i32 %c
+ ret i32 %cond
+}
+
+; CHECK-LABEL: select_i32_ne:
+; CHECK: sub.f %r6, 0x0, %r0
+; CHECK: sel.ne %r7, %r18, %rv
+define i32 @select_i32_ne(i32 inreg %a, i32 inreg %b, i32 inreg %c) {
+ %cmp = icmp ne i32 %a, 0
+ %cond = select i1 %cmp, i32 %b, i32 %c
+ ret i32 %cond
+}
+
+; CHECK-LABEL: select_i32_lt:
+; CHECK: sub.f %r6, %r7, %r0
+; CHECK: sel.lt %r6, %r7, %rv
+define i32 @select_i32_lt(i32 inreg %x, i32 inreg %y) #0 {
+ %1 = icmp slt i32 %x, %y
+ %2 = select i1 %1, i32 %x, i32 %y
+ ret i32 %2
+}
diff --git a/test/CodeGen/Lanai/set_and_hi.ll b/test/CodeGen/Lanai/set_and_hi.ll
new file mode 100644
index 00000000000..bfce094050c
--- /dev/null
+++ b/test/CodeGen/Lanai/set_and_hi.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s | FileCheck %s
+
+; Test matching of and_hi.
+
+target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+target triple = "lanai"
+
+@x = common global i32 0, align 4
+
+; CHECK-LABEL: setandhi:
+; CHECK: mov 0xfffffe4a, %r{{[0-9]+}}
+define void @setandhi() #0 {
+ store volatile i32 -438, i32* @x, align 4
+ ret void
+}
diff --git a/test/CodeGen/Lanai/shift.ll b/test/CodeGen/Lanai/shift.ll
new file mode 100644
index 00000000000..df5f91122ed
--- /dev/null
+++ b/test/CodeGen/Lanai/shift.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=lanai | FileCheck %s
+
+; Test lowering of shifts.
+
+define i32 @irs(i32 inreg %a) #0 {
+entry:
+ %shr = ashr i32 %a, 13
+ ret i32 %shr
+}
+; CHECK-LABEL: irs
+; CHECK: sha %r6, -0xd, %rv
+
+define i32 @urs(i32 inreg %a) #0 {
+entry:
+ %shr = lshr i32 %a, 13
+ ret i32 %shr
+}
+; CHECK-LABEL: urs
+; CHECK: sh %r6, -0xd, %rv
+
+define i32 @ls(i32 inreg %a) #0 {
+entry:
+ %shl = shl i32 %a, 13
+ ret i32 %shl
+}
+; CHECK-LABEL: ls
+; CHECK: sh %r6, 0xd, %rv
+
diff --git a/test/CodeGen/Lanai/stack-frame.ll b/test/CodeGen/Lanai/stack-frame.ll
new file mode 100644
index 00000000000..3564658fa0f
--- /dev/null
+++ b/test/CodeGen/Lanai/stack-frame.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=lanai < %s -o - | FileCheck %s
+
+define void @f1() {
+ %c = alloca i8, align 1
+ ret void
+}
+; CHECK-LABEL: f1:
+; CHECK: sub %sp, 0x10
+
+define i32 @f2() {
+ ret i32 1
+}
+; CHECK-LABEL: f2:
+; CHECK: sub %sp, 0x8
diff --git a/test/DebugInfo/Inputs/lanai-processes-relocations.elf b/test/DebugInfo/Inputs/lanai-processes-relocations.elf
deleted file mode 100644
index 88d519a2cdf..00000000000
--- a/test/DebugInfo/Inputs/lanai-processes-relocations.elf
+++ /dev/null
Binary files differ
diff --git a/test/DebugInfo/Lanai/processes-relocations.ll b/test/DebugInfo/Lanai/processes-relocations.ll
index 1fdf4a37fae..4f8138a8724 100644
--- a/test/DebugInfo/Lanai/processes-relocations.ll
+++ b/test/DebugInfo/Lanai/processes-relocations.ll
@@ -1,9 +1,5 @@
-; RUN: llvm-dwarfdump %p/../Inputs/lanai-processes-relocations.elf 2>&1 | FileCheck %s
-
-; FIXME: Use llc with this file as input instead of binary file.
-; NOTE: this test is currently not using llc, but using a binary input as the
-; rest of the backend is not yet in tree. Once the Lanai backend is in tree,
-; the binary file will be removed and this test will use llc.
+; RUN: llc -filetype=obj -O0 < %s -mtriple lanai-unknown-unknown | \
+; RUN: llvm-dwarfdump - 2>&1 | FileCheck %s
; CHECK-NOT: failed to compute relocation
@@ -15,5 +11,5 @@
!1 = !{!"empty.c", !"/a"}
!2 = !{}
!3 = !{i32 2, !"Dwarf Version", i32 4}
-!4 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 2, !"Debug Info Version", i32 1}
!5 = !{!"clang version 3.6.0 "}
diff --git a/test/MC/Disassembler/Lanai/lit.local.cfg b/test/MC/Disassembler/Lanai/lit.local.cfg
new file mode 100644
index 00000000000..3f30d055364
--- /dev/null
+++ b/test/MC/Disassembler/Lanai/lit.local.cfg
@@ -0,0 +1,3 @@
+if not 'Lanai' in config.root.targets:
+ config.unsupported = True
+
diff --git a/test/MC/Disassembler/Lanai/v11.txt b/test/MC/Disassembler/Lanai/v11.txt
new file mode 100644
index 00000000000..8e956f93e20
--- /dev/null
+++ b/test/MC/Disassembler/Lanai/v11.txt
@@ -0,0 +1,762 @@
+# RUN: llvm-mc -disassemble -triple lanai %s | FileCheck %s
+
+0x0a 0xc4 0x00 0x00
+# CHECK: add %r17, 0x0, %r21
+0x0a 0xc4 0x12 0x34
+# CHECK: add %r17, 0x1234, %r21
+0x0a 0xc5 0x12 0x34
+# CHECK: add %r17, 0x12340000, %r21
+0x0a 0xc6 0x00 0x00
+# CHECK: add.f %r17, 0x0, %r21
+0x0a 0xc6 0x12 0x34
+# CHECK: add.f %r17, 0x1234, %r21
+0x0a 0xc7 0x12 0x34
+# CHECK: add.f %r17, 0x12340000, %r21
+0xca 0xc4 0x90 0x00
+# CHECK: add %r17, %r18, %r21
+0xca 0xc6 0x90 0x00
+# CHECK: add.f %r17, %r18, %r21
+0xca 0xc4 0x91 0x00
+# CHECK: addc %r17, %r18, %r21
+0xca 0xc6 0x91 0x00
+# CHECK: addc.f %r17, %r18, %r21
+0x1a 0xc4 0x00 0x00
+# CHECK: addc %r17, 0x0, %r21
+0x1a 0xc4 0x12 0x34
+# CHECK: addc %r17, 0x1234, %r21
+0x1a 0xc5 0x12 0x34
+# CHECK: addc %r17, 0x12340000, %r21
+0x1a 0xc6 0x00 0x00
+# CHECK: addc.f %r17, 0x0, %r21
+0x1a 0xc6 0x12 0x34
+# CHECK: addc.f %r17, 0x1234, %r21
+0x1a 0xc7 0x12 0x34
+# CHECK: addc.f %r17, 0x12340000, %r21
+0x4a 0xc4 0x12 0x34
+# CHECK: and %r17, 0xffff1234, %r21
+0x4a 0xc5 0x12 0x34
+# CHECK: and %r17, 0x1234ffff, %r21
+0x4a 0xc6 0x12 0x34
+# CHECK: and.f %r17, 0xffff1234, %r21
+0x4a 0xc7 0x12 0x34
+# CHECK: and.f %r17, 0x1234ffff, %r21
+0xca 0xc4 0x94 0x00
+# CHECK: and %r17, %r18, %r21
+0xca 0xc6 0x94 0x00
+# CHECK: and.f %r17, %r18, %r21
+0xe0 0x12 0x34 0x54
+# CHECK: bt 0x123454
+0xe0 0x12 0x34 0x55
+# CHECK: bf 0x123454
+0xe2 0x12 0x34 0x54
+# CHECK: bugt 0x123454
+0xe2 0x12 0x34 0x55
+# CHECK: bule 0x123454
+0xe4 0x12 0x34 0x54
+# CHECK: bult 0x123454
+0xe4 0x12 0x34 0x55
+# CHECK: buge 0x123454
+0xe6 0x12 0x34 0x54
+# CHECK: bne 0x123454
+0xe6 0x12 0x34 0x55
+# CHECK: beq 0x123454
+0xe8 0x12 0x34 0x54
+# CHECK: bvc 0x123454
+0xe8 0x12 0x34 0x55
+# CHECK: bvs 0x123454
+0xea 0x12 0x34 0x54
+# CHECK: bpl 0x123454
+0xea 0x12 0x34 0x55
+# CHECK: bmi 0x123454
+0xec 0x12 0x34 0x54
+# CHECK: bge 0x123454
+0xec 0x12 0x34 0x55
+# CHECK: blt 0x123454
+0xee 0x12 0x34 0x54
+# CHECK: bgt 0x123454
+0xc1 0x00 0x9d 0x00
+# CHECK: bt %r19
+0xe1 0x00 0x56 0x7a
+# CHECK: bt.r 0x5678
+0xe1 0x00 0x56 0x7b
+# CHECK: bf.r 0x5678
+0xe3 0x00 0x56 0x7a
+# CHECK: bugt.r 0x5678
+0xe3 0x00 0x56 0x7b
+# CHECK: bule.r 0x5678
+0xe5 0x00 0x56 0x7a
+# CHECK: bult.r 0x5678
+0xe5 0x00 0x56 0x7b
+# CHECK: buge.r 0x5678
+0xe7 0x00 0x56 0x7a
+# CHECK: bne.r 0x5678
+0xe7 0x00 0x56 0x7b
+# CHECK: beq.r 0x5678
+0xe9 0x00 0x56 0x7a
+# CHECK: bvc.r 0x5678
+0xe9 0x00 0x56 0x7b
+# CHECK: bvs.r 0x5678
+0xeb 0x00 0x56 0x7a
+# CHECK: bpl.r 0x5678
+0xeb 0x00 0x56 0x7b
+# CHECK: bmi.r 0x5678
+0xed 0x00 0x56 0x7a
+# CHECK: bge.r 0x5678
+0xed 0x00 0x56 0x7b
+# CHECK: blt.r 0x5678
+0xef 0x00 0x56 0x7a
+# CHECK: bgt.r 0x5678
+0x8a 0xc6 0x80 0x00
+# CHECK: ld -32768[%r17], %r21
+0x8a 0xc6 0xfc 0x00
+# CHECK: ld -1024[%r17], %r21
+0x8a 0xc4 0x00 0x00
+# CHECK: ld 0[%r17], %r21
+0x8a 0xc6 0x04 0x00
+# CHECK: ld 1024[%r17], %r21
+0x8a 0xc6 0x7f 0xff
+# CHECK: ld 32767[%r17], %r21
+0xaa 0xc6 0x90 0x02
+# CHECK: ld [%r17 add %r18], %r21
+0xaa 0xc6 0x90 0x03
+# CHECK: uld [%r17 add %r18], %r21
+0xfa 0xc7 0x0a 0x00
+# CHECK: ld.h -512[%r17], %r21
+0xfa 0xc7 0x0b 0xf3
+# CHECK: ld.h -13[%r17], %r21
+0xfa 0xc7 0x08 0x12
+# CHECK: ld.h 18[%r17], %r21
+0xfa 0xc7 0x09 0xff
+# CHECK: ld.h 511[%r17], %r21
+0xfa 0xc7 0x4a 0x00
+# CHECK: ld.b -512[%r17], %r21
+0xfa 0xc7 0x4b 0xf3
+# CHECK: ld.b -13[%r17], %r21
+0xfa 0xc7 0x48 0x12
+# CHECK: ld.b 18[%r17], %r21
+0xfa 0xc7 0x49 0xff
+# CHECK: ld.b 511[%r17], %r21
+0xfa 0xc7 0x1a 0x00
+# CHECK: uld.h -512[%r17], %r21
+0xfa 0xc7 0x1b 0xf3
+# CHECK: uld.h -13[%r17], %r21
+0xfa 0xc7 0x18 0x12
+# CHECK: uld.h 18[%r17], %r21
+0xfa 0xc7 0x19 0xff
+# CHECK: uld.h 511[%r17], %r21
+0xfa 0xc7 0x5a 0x00
+# CHECK: uld.b -512[%r17], %r21
+0xfa 0xc7 0x5b 0xf3
+# CHECK: uld.b -13[%r17], %r21
+0xfa 0xc7 0x58 0x12
+# CHECK: uld.b 18[%r17], %r21
+0xfa 0xc7 0x59 0xff
+# CHECK: uld.b 511[%r17], %r21
+0x8a 0xc7 0x80 0x00
+# CHECK: ld -32768[*%r17], %r21
+0x8a 0xc7 0xfc 0x00
+# CHECK: ld -1024[*%r17], %r21
+0x8a 0xc7 0x04 0x00
+# CHECK: ld 1024[*%r17], %r21
+0x8a 0xc7 0x7f 0xff
+# CHECK: ld 32767[*%r17], %r21
+0x8a 0xc7 0xff 0xfc
+# CHECK: ld [--%r17], %r21
+0x8a 0xc7 0x00 0x04
+# CHECK: ld [++%r17], %r21
+0xfa 0xc7 0x0f 0xfe
+# CHECK: ld.h [--%r17], %r21
+0xfa 0xc7 0x0c 0x02
+# CHECK: ld.h [++%r17], %r21
+0xfa 0xc7 0x1f 0xfe
+# CHECK: uld.h [--%r17], %r21
+0xfa 0xc7 0x1c 0x02
+# CHECK: uld.h [++%r17], %r21
+0xfa 0xc7 0x4f 0xff
+# CHECK: ld.b [--%r17], %r21
+0xfa 0xc7 0x4c 0x01
+# CHECK: ld.b [++%r17], %r21
+0xfa 0xc7 0x5f 0xff
+# CHECK: uld.b [--%r17], %r21
+0xfa 0xc7 0x5c 0x01
+# CHECK: uld.b [++%r17], %r21
+0xaa 0xc7 0x90 0x02
+# CHECK: ld [*%r17 add %r18], %r21
+0xfa 0xc7 0x0e 0x00
+# CHECK: ld.h -512[*%r17], %r21
+0xfa 0xc7 0x0f 0xf3
+# CHECK: ld.h -13[*%r17], %r21
+0xfa 0xc7 0x0c 0x12
+# CHECK: ld.h 18[*%r17], %r21
+0xfa 0xc7 0x0d 0xff
+# CHECK: ld.h 511[*%r17], %r21
+0xfa 0xc7 0x4e 0x00
+# CHECK: ld.b -512[*%r17], %r21
+0xfa 0xc7 0x4f 0xf3
+# CHECK: ld.b -13[*%r17], %r21
+0xfa 0xc7 0x4c 0x12
+# CHECK: ld.b 18[*%r17], %r21
+0xfa 0xc7 0x4d 0xff
+# CHECK: ld.b 511[*%r17], %r21
+0xfa 0xc7 0x1e 0x00
+# CHECK: uld.h -512[*%r17], %r21
+0xfa 0xc7 0x1f 0xf3
+# CHECK: uld.h -13[*%r17], %r21
+0xfa 0xc7 0x1c 0x12
+# CHECK: uld.h 18[*%r17], %r21
+0xfa 0xc7 0x1d 0xff
+# CHECK: uld.h 511[*%r17], %r21
+0xfa 0xc7 0x5e 0x00
+# CHECK: uld.b -512[*%r17], %r21
+0xfa 0xc7 0x5f 0xf3
+# CHECK: uld.b -13[*%r17], %r21
+0xfa 0xc7 0x5c 0x12
+# CHECK: uld.b 18[*%r17], %r21
+0xfa 0xc7 0x5d 0xff
+# CHECK: uld.b 511[*%r17], %r21
+0x8a 0xc5 0x80 0x00
+# CHECK: ld -32768[%r17*], %r21
+0x8a 0xc5 0xfc 0x00
+# CHECK: ld -1024[%r17*], %r21
+0x8a 0xc5 0x04 0x00
+# CHECK: ld 1024[%r17*], %r21
+0x8a 0xc5 0x7f 0xff
+# CHECK: ld 32767[%r17*], %r21
+0x8a 0xc5 0xff 0xfc
+# CHECK: ld [%r17--], %r21
+0x8a 0xc5 0x00 0x04
+# CHECK: ld [%r17++], %r21
+0xfa 0xc7 0x07 0xfe
+# CHECK: ld.h [%r17--], %r21
+0xfa 0xc7 0x04 0x02
+# CHECK: ld.h [%r17++], %r21
+0xfa 0xc7 0x17 0xfe
+# CHECK: uld.h [%r17--], %r21
+0xfa 0xc7 0x14 0x02
+# CHECK: uld.h [%r17++], %r21
+0xfa 0xc7 0x47 0xff
+# CHECK: ld.b [%r17--], %r21
+0xfa 0xc7 0x44 0x01
+# CHECK: ld.b [%r17++], %r21
+0xfa 0xc7 0x57 0xff
+# CHECK: uld.b [%r17--], %r21
+0xfa 0xc7 0x54 0x01
+# CHECK: uld.b [%r17++], %r21
+0xaa 0xc5 0x90 0x02
+# CHECK: ld [%r17* add %r18], %r21
+0xfa 0xc7 0x06 0x00
+# CHECK: ld.h -512[%r17*], %r21
+0xfa 0xc7 0x07 0xf3
+# CHECK: ld.h -13[%r17*], %r21
+0xfa 0xc7 0x04 0x12
+# CHECK: ld.h 18[%r17*], %r21
+0xfa 0xc7 0x05 0xff
+# CHECK: ld.h 511[%r17*], %r21
+0xfa 0xc7 0x46 0x00
+# CHECK: ld.b -512[%r17*], %r21
+0xfa 0xc7 0x47 0xf3
+# CHECK: ld.b -13[%r17*], %r21
+0xfa 0xc7 0x44 0x12
+# CHECK: ld.b 18[%r17*], %r21
+0xfa 0xc7 0x45 0xff
+# CHECK: ld.b 511[%r17*], %r21
+0xfa 0xc7 0x16 0x00
+# CHECK: uld.h -512[%r17*], %r21
+0xfa 0xc7 0x17 0xf3
+# CHECK: uld.h -13[%r17*], %r21
+0xfa 0xc7 0x14 0x12
+# CHECK: uld.h 18[%r17*], %r21
+0xfa 0xc7 0x15 0xff
+# CHECK: uld.h 511[%r17*], %r21
+0xfa 0xc7 0x56 0x00
+# CHECK: uld.b -512[%r17*], %r21
+0xfa 0xc7 0x57 0xf3
+# CHECK: uld.b -13[%r17*], %r21
+0xfa 0xc7 0x54 0x12
+# CHECK: uld.b 18[%r17*], %r21
+0xfa 0xc7 0x55 0xff
+# CHECK: uld.b 511[%r17*], %r21
+0xaa 0xc6 0x90 0x02
+# CHECK: ld [%r17 add %r18], %r21
+0xaa 0xc6 0x91 0x02
+# CHECK: ld [%r17 addc %r18], %r21
+0xaa 0xc6 0x92 0x02
+# CHECK: ld [%r17 sub %r18], %r21
+0xaa 0xc6 0x93 0x02
+# CHECK: ld [%r17 subb %r18], %r21
+0xaa 0xc6 0x94 0x02
+# CHECK: ld [%r17 and %r18], %r21
+0xaa 0xc6 0x95 0x02
+# CHECK: ld [%r17 or %r18], %r21
+0xaa 0xc6 0x96 0x02
+# CHECK: ld [%r17 xor %r18], %r21
+0xaa 0xc6 0x97 0x82
+# CHECK: ld [%r17 sh %r18], %r21
+0xaa 0xc6 0x97 0xc2
+# CHECK: ld [%r17 sha %r18], %r21
+0xaa 0xc7 0x90 0x02
+# CHECK: ld [*%r17 add %r18], %r21
+0xaa 0xc7 0x91 0x02
+# CHECK: ld [*%r17 addc %r18], %r21
+0xaa 0xc7 0x92 0x02
+# CHECK: ld [*%r17 sub %r18], %r21
+0xaa 0xc7 0x93 0x02
+# CHECK: ld [*%r17 subb %r18], %r21
+0xaa 0xc7 0x94 0x02
+# CHECK: ld [*%r17 and %r18], %r21
+0xaa 0xc7 0x95 0x02
+# CHECK: ld [*%r17 or %r18], %r21
+0xaa 0xc7 0x96 0x02
+# CHECK: ld [*%r17 xor %r18], %r21
+0xaa 0xc7 0x97 0x82
+# CHECK: ld [*%r17 sh %r18], %r21
+0xaa 0xc7 0x97 0xc2
+# CHECK: ld [*%r17 sha %r18], %r21
+0xaa 0xc5 0x90 0x02
+# CHECK: ld [%r17* add %r18], %r21
+0xaa 0xc5 0x91 0x02
+# CHECK: ld [%r17* addc %r18], %r21
+0xaa 0xc5 0x92 0x02
+# CHECK: ld [%r17* sub %r18], %r21
+0xaa 0xc5 0x93 0x02
+# CHECK: ld [%r17* subb %r18], %r21
+0xaa 0xc5 0x94 0x02
+# CHECK: ld [%r17* and %r18], %r21
+0xaa 0xc5 0x95 0x02
+# CHECK: ld [%r17* or %r18], %r21
+0xaa 0xc5 0x96 0x02
+# CHECK: ld [%r17* xor %r18], %r21
+0xaa 0xc5 0x97 0x82
+# CHECK: ld [%r17* sh %r18], %r21
+0xaa 0xc5 0x97 0xc2
+# CHECK: ld [%r17* sha %r18], %r21
+0xfa 0x84 0x23 0x44
+# CHECK: ld [0x12344], %r21
+0xda 0xc4 0x00 0x02
+# CHECK: leadz %r17, %r21
+0x08 0x80 0x00 0x00
+# CHECK: mov 0x0, %r17
+0x08 0x80 0x12 0x34
+# CHECK: mov 0x1234, %r17
+0x08 0x81 0x12 0x34
+# CHECK: mov 0x12340000, %r17
+0x08 0x81 0xaa 0xaa
+# CHECK: mov 0xaaaa0000, %r17
+0xc8 0xc8 0x00 0x00
+# CHECK: mov %r18, %r17
+0xf8 0x86 0x23 0x44
+# CHECK: mov 0x12344, %r17
+0x48 0x84 0x12 0x34
+# CHECK: mov 0xffff1234, %r17
+0x48 0x85 0x12 0x34
+# CHECK: mov 0x1234ffff, %r17
+0x00 0x00 0x00 0x01
+# CHECK: nop
+0x5a 0xc4 0x00 0x00
+# CHECK: or %r17, 0x0, %r21
+0x5a 0xc4 0x12 0x34
+# CHECK: or %r17, 0x1234, %r21
+0x5a 0xc5 0x12 0x34
+# CHECK: or %r17, 0x12340000, %r21
+0x5a 0xc6 0x00 0x00
+# CHECK: or.f %r17, 0x0, %r21
+0x5a 0xc6 0x12 0x34
+# CHECK: or.f %r17, 0x1234, %r21
+0x5a 0xc7 0x12 0x34
+# CHECK: or.f %r17, 0x12340000, %r21
+0xca 0xc4 0x95 0x00
+# CHECK: or %r17, %r18, %r21
+0xca 0xc6 0x95 0x00
+# CHECK: or.f %r17, %r18, %r21
+0xda 0xc4 0x00 0x01
+# CHECK: popc %r17, %r21
+0xe0 0x54 0x00 0x02
+# CHECK: st %r21
+0xe2 0x54 0x00 0x02
+# CHECK: sugt %r21
+0xe2 0x54 0x00 0x03
+# CHECK: sule %r21
+0xe4 0x54 0x00 0x02
+# CHECK: sult %r21
+0xe4 0x54 0x00 0x03
+# CHECK: suge %r21
+0xe6 0x54 0x00 0x02
+# CHECK: sne %r21
+0xe6 0x54 0x00 0x03
+# CHECK: seq %r21
+0xe8 0x54 0x00 0x02
+# CHECK: svc %r21
+0xe8 0x54 0x00 0x03
+# CHECK: svs %r21
+0xea 0x54 0x00 0x02
+# CHECK: spl %r21
+0xea 0x54 0x00 0x03
+# CHECK: smi %r21
+0xec 0x54 0x00 0x02
+# CHECK: sge %r21
+0xec 0x54 0x00 0x03
+# CHECK: slt %r21
+0xee 0x54 0x00 0x02
+# CHECK: sgt %r21
+0x7a 0xc4 0xff 0xe1
+# CHECK: sh %r17, -0x1f, %r21
+0x7a 0xc4 0xff 0xfb
+# CHECK: sh %r17, -0x5, %r21
+0x7a 0xc4 0x00 0x02
+# CHECK: sh %r17, 0x2, %r21
+0x7a 0xc4 0x00 0x1f
+# CHECK: sh %r17, 0x1f, %r21
+0x7a 0xc6 0xff 0xe1
+# CHECK: sh.f %r17, -0x1f, %r21
+0x7a 0xc6 0xff 0xfb
+# CHECK: sh.f %r17, -0x5, %r21
+0x7a 0xc6 0x00 0x02
+# CHECK: sh.f %r17, 0x2, %r21
+0x7a 0xc6 0x00 0x1f
+# CHECK: sh.f %r17, 0x1f, %r21
+0xca 0xc4 0x97 0x80
+# CHECK: sh %r17, %r18, %r21
+0xca 0xc6 0x97 0x80
+# CHECK: sh.f %r17, %r18, %r21
+0x7a 0xc5 0xff 0xe1
+# CHECK: sha %r17, -0x1f, %r21
+0x7a 0xc5 0xff 0xfb
+# CHECK: sha %r17, -0x5, %r21
+0x7a 0xc5 0x00 0x02
+# CHECK: sha %r17, 0x2, %r21
+0x7a 0xc5 0x00 0x1f
+# CHECK: sha %r17, 0x1f, %r21
+0x7a 0xc7 0xff 0xe1
+# CHECK: sha.f %r17, -0x1f, %r21
+0x7a 0xc7 0xff 0xfb
+# CHECK: sha.f %r17, -0x5, %r21
+0x7a 0xc7 0x00 0x02
+# CHECK: sha.f %r17, 0x2, %r21
+0x7a 0xc7 0x00 0x1f
+# CHECK: sha.f %r17, 0x1f, %r21
+0xca 0xc4 0x97 0xc0
+# CHECK: sha %r17, %r18, %r21
+0xca 0xc6 0x97 0xc0
+# CHECK: sha.f %r17, %r18, %r21
+0x98 0xce 0x80 0x00
+# CHECK: st %r17, -32768[%r19]
+0x98 0xce 0xfc 0x00
+# CHECK: st %r17, -1024[%r19]
+0x98 0xcc 0x00 0x00
+# CHECK: st %r17, 0[%r19]
+0x98 0xce 0x04 0x00
+# CHECK: st %r17, 1024[%r19]
+0x98 0xce 0x7f 0xff
+# CHECK: st %r17, 32767[%r19]
+0xf8 0xcf 0x2a 0x00
+# CHECK: st.h %r17, -512[%r19]
+0xf8 0xcf 0x2b 0xf3
+# CHECK: st.h %r17, -13[%r19]
+0xf8 0xcf 0x28 0x12
+# CHECK: st.h %r17, 18[%r19]
+0xf8 0xcf 0x29 0xff
+# CHECK: st.h %r17, 511[%r19]
+0xf8 0xcf 0x6a 0x00
+# CHECK: st.b %r17, -512[%r19]
+0xf8 0xcf 0x6b 0xf3
+# CHECK: st.b %r17, -13[%r19]
+0xf8 0xcf 0x68 0x12
+# CHECK: st.b %r17, 18[%r19]
+0xf8 0xcf 0x69 0xff
+# CHECK: st.b %r17, 511[%r19]
+0xb8 0xce 0x90 0x02
+# CHECK: st %r17, [%r19 add %r18]
+0xb8 0xce 0x90 0x00
+# CHECK: st.h %r17, [%r19 add %r18]
+0xb8 0xce 0x90 0x04
+# CHECK: st.b %r17, [%r19 add %r18]
+0x98 0xcf 0x80 0x00
+# CHECK: st %r17, -32768[*%r19]
+0x98 0xcf 0xfc 0x00
+# CHECK: st %r17, -1024[*%r19]
+0x98 0xcf 0x04 0x00
+# CHECK: st %r17, 1024[*%r19]
+0x98 0xcf 0x7f 0xff
+# CHECK: st %r17, 32767[*%r19]
+0xf8 0xcf 0x2e 0x00
+# CHECK: st.h %r17, -512[*%r19]
+0xf8 0xcf 0x2f 0xf3
+# CHECK: st.h %r17, -13[*%r19]
+0xf8 0xcf 0x2c 0x12
+# CHECK: st.h %r17, 18[*%r19]
+0xf8 0xcf 0x2d 0xff
+# CHECK: st.h %r17, 511[*%r19]
+0xf8 0xcf 0x6e 0x00
+# CHECK: st.b %r17, -512[*%r19]
+0xf8 0xcf 0x6f 0xf3
+# CHECK: st.b %r17, -13[*%r19]
+0xf8 0xcf 0x6c 0x12
+# CHECK: st.b %r17, 18[*%r19]
+0xf8 0xcf 0x6d 0xff
+# CHECK: st.b %r17, 511[*%r19]
+0x98 0xcf 0xff 0xfc
+# CHECK: st %r17, [--%r19]
+0x98 0xcf 0x00 0x04
+# CHECK: st %r17, [++%r19]
+0xf8 0xcf 0x2f 0xfe
+# CHECK: st.h %r17, [--%r19]
+0xf8 0xcf 0x2c 0x02
+# CHECK: st.h %r17, [++%r19]
+0xf8 0xcf 0x6f 0xff
+# CHECK: st.b %r17, [--%r19]
+0xf8 0xcf 0x6c 0x01
+# CHECK: st.b %r17, [++%r19]
+0xb8 0xcf 0x90 0x02
+# CHECK: st %r17, [*%r19 add %r18]
+0xb8 0xcf 0x90 0x00
+# CHECK: st.h %r17, [*%r19 add %r18]
+0xb8 0xcf 0x90 0x04
+# CHECK: st.b %r17, [*%r19 add %r18]
+0x98 0xcd 0x80 0x00
+# CHECK: st %r17, -32768[%r19*]
+0x98 0xcd 0xfc 0x00
+# CHECK: st %r17, -1024[%r19*]
+0x98 0xcd 0x04 0x00
+# CHECK: st %r17, 1024[%r19*]
+0x98 0xcd 0x7f 0xff
+# CHECK: st %r17, 32767[%r19*]
+0xf8 0xcf 0x26 0x00
+# CHECK: st.h %r17, -512[%r19*]
+0xf8 0xcf 0x27 0xf3
+# CHECK: st.h %r17, -13[%r19*]
+0xf8 0xcf 0x24 0x12
+# CHECK: st.h %r17, 18[%r19*]
+0xf8 0xcf 0x25 0xff
+# CHECK: st.h %r17, 511[%r19*]
+0xf8 0xcf 0x66 0x00
+# CHECK: st.b %r17, -512[%r19*]
+0xf8 0xcf 0x67 0xf3
+# CHECK: st.b %r17, -13[%r19*]
+0xf8 0xcf 0x64 0x12
+# CHECK: st.b %r17, 18[%r19*]
+0xf8 0xcf 0x65 0xff
+# CHECK: st.b %r17, 511[%r19*]
+0x98 0xcd 0xff 0xfc
+# CHECK: st %r17, [%r19--]
+0x98 0xcd 0x00 0x04
+# CHECK: st %r17, [%r19++]
+0xf8 0xcf 0x27 0xfe
+# CHECK: st.h %r17, [%r19--]
+0xf8 0xcf 0x24 0x02
+# CHECK: st.h %r17, [%r19++]
+0xf8 0xcf 0x67 0xff
+# CHECK: st.b %r17, [%r19--]
+0xf8 0xcf 0x64 0x01
+# CHECK: st.b %r17, [%r19++]
+0xb8 0xcd 0x90 0x02
+# CHECK: st %r17, [%r19* add %r18]
+0xb8 0xcd 0x90 0x00
+# CHECK: st.h %r17, [%r19* add %r18]
+0xb8 0xcd 0x90 0x04
+# CHECK: st.b %r17, [%r19* add %r18]
+0xba 0xc6 0x90 0x02
+# CHECK: st %r21, [%r17 add %r18]
+0xba 0xc6 0x91 0x02
+# CHECK: st %r21, [%r17 addc %r18]
+0xba 0xc6 0x92 0x02
+# CHECK: st %r21, [%r17 sub %r18]
+0xba 0xc6 0x93 0x02
+# CHECK: st %r21, [%r17 subb %r18]
+0xba 0xc6 0x94 0x02
+# CHECK: st %r21, [%r17 and %r18]
+0xba 0xc6 0x95 0x02
+# CHECK: st %r21, [%r17 or %r18]
+0xba 0xc6 0x96 0x02
+# CHECK: st %r21, [%r17 xor %r18]
+0xba 0xc6 0x97 0x82
+# CHECK: st %r21, [%r17 sh %r18]
+0xba 0xc6 0x97 0xc2
+# CHECK: st %r21, [%r17 sha %r18]
+0xba 0xc6 0x90 0x00
+# CHECK: st.h %r21, [%r17 add %r18]
+0xba 0xc6 0x91 0x00
+# CHECK: st.h %r21, [%r17 addc %r18]
+0xba 0xc6 0x92 0x00
+# CHECK: st.h %r21, [%r17 sub %r18]
+0xba 0xc6 0x93 0x00
+# CHECK: st.h %r21, [%r17 subb %r18]
+0xba 0xc6 0x94 0x00
+# CHECK: st.h %r21, [%r17 and %r18]
+0xba 0xc6 0x95 0x00
+# CHECK: st.h %r21, [%r17 or %r18]
+0xba 0xc6 0x96 0x00
+# CHECK: st.h %r21, [%r17 xor %r18]
+0xba 0xc6 0x97 0x80
+# CHECK: st.h %r21, [%r17 sh %r18]
+0xba 0xc6 0x97 0xc0
+# CHECK: st.h %r21, [%r17 sha %r18]
+0xba 0xc6 0x90 0x04
+# CHECK: st.b %r21, [%r17 add %r18]
+0xba 0xc6 0x91 0x04
+# CHECK: st.b %r21, [%r17 addc %r18]
+0xba 0xc6 0x92 0x04
+# CHECK: st.b %r21, [%r17 sub %r18]
+0xba 0xc6 0x93 0x04
+# CHECK: st.b %r21, [%r17 subb %r18]
+0xba 0xc6 0x94 0x04
+# CHECK: st.b %r21, [%r17 and %r18]
+0xba 0xc6 0x95 0x04
+# CHECK: st.b %r21, [%r17 or %r18]
+0xba 0xc6 0x96 0x04
+# CHECK: st.b %r21, [%r17 xor %r18]
+0xba 0xc6 0x97 0x84
+# CHECK: st.b %r21, [%r17 sh %r18]
+0xba 0xc6 0x97 0xc4
+# CHECK: st.b %r21, [%r17 sha %r18]
+0xba 0xc7 0x90 0x02
+# CHECK: st %r21, [*%r17 add %r18]
+0xba 0xc7 0x91 0x02
+# CHECK: st %r21, [*%r17 addc %r18]
+0xba 0xc7 0x92 0x02
+# CHECK: st %r21, [*%r17 sub %r18]
+0xba 0xc7 0x93 0x02
+# CHECK: st %r21, [*%r17 subb %r18]
+0xba 0xc7 0x94 0x02
+# CHECK: st %r21, [*%r17 and %r18]
+0xba 0xc7 0x95 0x02
+# CHECK: st %r21, [*%r17 or %r18]
+0xba 0xc7 0x96 0x02
+# CHECK: st %r21, [*%r17 xor %r18]
+0xba 0xc7 0x97 0xc2
+# CHECK: st %r21, [*%r17 sha %r18]
+0xba 0xc7 0x90 0x00
+# CHECK: st.h %r21, [*%r17 add %r18]
+0xba 0xc7 0x91 0x00
+# CHECK: st.h %r21, [*%r17 addc %r18]
+0xba 0xc7 0x92 0x00
+# CHECK: st.h %r21, [*%r17 sub %r18]
+0xba 0xc7 0x93 0x00
+# CHECK: st.h %r21, [*%r17 subb %r18]
+0xba 0xc7 0x94 0x00
+# CHECK: st.h %r21, [*%r17 and %r18]
+0xba 0xc7 0x95 0x00
+# CHECK: st.h %r21, [*%r17 or %r18]
+0xba 0xc7 0x96 0x00
+# CHECK: st.h %r21, [*%r17 xor %r18]
+0xba 0xc7 0x97 0xc0
+# CHECK: st.h %r21, [*%r17 sha %r18]
+0xba 0xc7 0x90 0x04
+# CHECK: st.b %r21, [*%r17 add %r18]
+0xba 0xc7 0x91 0x04
+# CHECK: st.b %r21, [*%r17 addc %r18]
+0xba 0xc7 0x92 0x04
+# CHECK: st.b %r21, [*%r17 sub %r18]
+0xba 0xc7 0x93 0x04
+# CHECK: st.b %r21, [*%r17 subb %r18]
+0xba 0xc7 0x94 0x04
+# CHECK: st.b %r21, [*%r17 and %r18]
+0xba 0xc7 0x95 0x04
+# CHECK: st.b %r21, [*%r17 or %r18]
+0xba 0xc7 0x96 0x04
+# CHECK: st.b %r21, [*%r17 xor %r18]
+0xba 0xc7 0x97 0xc4
+# CHECK: st.b %r21, [*%r17 sha %r18]
+0xba 0xc5 0x90 0x02
+# CHECK: st %r21, [%r17* add %r18]
+0xba 0xc5 0x91 0x02
+# CHECK: st %r21, [%r17* addc %r18]
+0xba 0xc5 0x92 0x02
+# CHECK: st %r21, [%r17* sub %r18]
+0xba 0xc5 0x93 0x02
+# CHECK: st %r21, [%r17* subb %r18]
+0xba 0xc5 0x94 0x02
+# CHECK: st %r21, [%r17* and %r18]
+0xba 0xc5 0x95 0x02
+# CHECK: st %r21, [%r17* or %r18]
+0xba 0xc5 0x96 0x02
+# CHECK: st %r21, [%r17* xor %r18]
+0xba 0xc5 0x97 0x82
+# CHECK: st %r21, [%r17* sh %r18]
+0xba 0xc5 0x97 0xc2
+# CHECK: st %r21, [%r17* sha %r18]
+0xba 0xc5 0x90 0x00
+# CHECK: st.h %r21, [%r17* add %r18]
+0xba 0xc5 0x91 0x00
+# CHECK: st.h %r21, [%r17* addc %r18]
+0xba 0xc5 0x92 0x00
+# CHECK: st.h %r21, [%r17* sub %r18]
+0xba 0xc5 0x93 0x00
+# CHECK: st.h %r21, [%r17* subb %r18]
+0xba 0xc5 0x94 0x00
+# CHECK: st.h %r21, [%r17* and %r18]
+0xba 0xc5 0x95 0x00
+# CHECK: st.h %r21, [%r17* or %r18]
+0xba 0xc5 0x96 0x00
+# CHECK: st.h %r21, [%r17* xor %r18]
+0xba 0xc5 0x97 0x80
+# CHECK: st.h %r21, [%r17* sh %r18]
+0xba 0xc5 0x97 0xc0
+# CHECK: st.h %r21, [%r17* sha %r18]
+0xba 0xc5 0x90 0x04
+# CHECK: st.b %r21, [%r17* add %r18]
+0xba 0xc5 0x91 0x04
+# CHECK: st.b %r21, [%r17* addc %r18]
+0xba 0xc5 0x92 0x04
+# CHECK: st.b %r21, [%r17* sub %r18]
+0xba 0xc5 0x93 0x04
+# CHECK: st.b %r21, [%r17* subb %r18]
+0xba 0xc5 0x94 0x04
+# CHECK: st.b %r21, [%r17* and %r18]
+0xba 0xc5 0x95 0x04
+# CHECK: st.b %r21, [%r17* or %r18]
+0xba 0xc5 0x96 0x04
+# CHECK: st.b %r21, [%r17* xor %r18]
+0xba 0xc5 0x97 0x84
+# CHECK: st.b %r21, [%r17* sh %r18]
+0xba 0xc5 0x97 0xc4
+# CHECK: st.b %r21, [%r17* sha %r18]
+0xfa 0x85 0x23 0x44
+# CHECK: st %r21, [0x12344]
+0x2a 0xc4 0x00 0x00
+# CHECK: sub %r17, 0x0, %r21
+0x2a 0xc4 0x12 0x34
+# CHECK: sub %r17, 0x1234, %r21
+0x2a 0xc5 0x12 0x34
+# CHECK: sub %r17, 0x12340000, %r21
+0x2a 0xc6 0x00 0x00
+# CHECK: sub.f %r17, 0x0, %r21
+0x2a 0xc6 0x12 0x34
+# CHECK: sub.f %r17, 0x1234, %r21
+0x2a 0xc7 0x12 0x34
+# CHECK: sub.f %r17, 0x12340000, %r21
+0xca 0xc4 0x92 0x00
+# CHECK: sub %r17, %r18, %r21
+0xca 0xc6 0x92 0x00
+# CHECK: sub.f %r17, %r18, %r21
+0x3a 0xc4 0x00 0x00
+# CHECK: subb %r17, 0x0, %r21
+0x3a 0xc4 0x12 0x34
+# CHECK: subb %r17, 0x1234, %r21
+0x3a 0xc5 0x12 0x34
+# CHECK: subb %r17, 0x12340000, %r21
+0x3a 0xc6 0x00 0x00
+# CHECK: subb.f %r17, 0x0, %r21
+0x3a 0xc6 0x12 0x34
+# CHECK: subb.f %r17, 0x1234, %r21
+0x3a 0xc7 0x12 0x34
+# CHECK: subb.f %r17, 0x12340000, %r21
+0xca 0xc4 0x93 0x00
+# CHECK: subb %r17, %r18, %r21
+0xca 0xc6 0x93 0x00
+# CHECK: subb.f %r17, %r18, %r21
+0x6a 0xc4 0x00 0x00
+# CHECK: xor %r17, 0x0, %r21
+0x6a 0xc4 0x12 0x34
+# CHECK: xor %r17, 0x1234, %r21
+0x6a 0xc5 0x12 0x34
+# CHECK: xor %r17, 0x12340000, %r21
+0x6a 0xc6 0x00 0x00
+# CHECK: xor.f %r17, 0x0, %r21
+0x6a 0xc6 0x12 0x34
+# CHECK: xor.f %r17, 0x1234, %r21
+0x6a 0xc7 0x12 0x34
+# CHECK: xor.f %r17, 0x12340000, %r21
+0xca 0xc4 0x96 0x00
+# CHECK: xor %r17, %r18, %r21
+0xca 0xc6 0x96 0x00
+# CHECK: xor.f %r17, %r18, %r21
diff --git a/test/MC/Lanai/lit.local.cfg b/test/MC/Lanai/lit.local.cfg
new file mode 100644
index 00000000000..3f30d055364
--- /dev/null
+++ b/test/MC/Lanai/lit.local.cfg
@@ -0,0 +1,3 @@
+if not 'Lanai' in config.root.targets:
+ config.unsupported = True
+
diff --git a/test/MC/Lanai/v11.s b/test/MC/Lanai/v11.s
new file mode 100644
index 00000000000..416b34e4981
--- /dev/null
+++ b/test/MC/Lanai/v11.s
@@ -0,0 +1,830 @@
+! RUN: llvm-mc -arch=lanai -show-encoding %s | FileCheck %s
+
+add %r17, 0, %r21
+! CHECK: 0x0a,0xc4,0x00,0x00
+add %r17, 0x00001234, %r21
+! CHECK: 0x0a,0xc4,0x12,0x34
+add %r17, 0x12340000, %r21
+! CHECK: 0x0a,0xc5,0x12,0x34
+add.f %r17, 0, %r21
+! CHECK: 0x0a,0xc6,0x00,0x00
+add.f %r17, 0x00001234, %r21
+! CHECK: 0x0a,0xc6,0x12,0x34
+add.f %r17, 0x12340000, %r21
+! CHECK: 0x0a,0xc7,0x12,0x34
+add %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x90,0x00
+add.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x90,0x00
+addc %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x91,0x00
+addc.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x91,0x00
+addc %r17, 0, %r21
+! CHECK: 0x1a,0xc4,0x00,0x00
+addc %r17, 0x00001234, %r21
+! CHECK: 0x1a,0xc4,0x12,0x34
+addc %r17, 0x12340000, %r21
+! CHECK: 0x1a,0xc5,0x12,0x34
+addc.f %r17, 0, %r21
+! CHECK: 0x1a,0xc6,0x00,0x00
+addc.f %r17, 0x00001234, %r21
+! CHECK: 0x1a,0xc6,0x12,0x34
+addc.f %r17, 0x12340000, %r21
+! CHECK: 0x1a,0xc7,0x12,0x34
+and %r17, 0xffff1234, %r21
+! CHECK: 0x4a,0xc4,0x12,0x34
+and %r17, 0x1234ffff, %r21
+! CHECK: 0x4a,0xc5,0x12,0x34
+and.f %r17, 0xffff1234, %r21
+! CHECK: 0x4a,0xc6,0x12,0x34
+and.f %r17, 0x1234ffff, %r21
+! CHECK: 0x4a,0xc7,0x12,0x34
+and %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x94,0x00
+and.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x94,0x00
+bt 0x123454
+! CHECK: 0xe0,0x12,0x34,0x54
+bf 0x123454
+! CHECK: 0xe0,0x12,0x34,0x55
+bhi 0x123454
+! CHECK: 0xe2,0x12,0x34,0x54
+bugt 0x123454
+! CHECK: 0xe2,0x12,0x34,0x54
+bls 0x123454
+! CHECK: 0xe2,0x12,0x34,0x55
+bule 0x123454
+! CHECK: 0xe2,0x12,0x34,0x55
+bcc 0x123454
+! CHECK: 0xe4,0x12,0x34,0x54
+bult 0x123454
+! CHECK: 0xe4,0x12,0x34,0x54
+bcs 0x123454
+! CHECK: 0xe4,0x12,0x34,0x55
+buge 0x123454
+! CHECK: 0xe4,0x12,0x34,0x55
+bne 0x123454
+! CHECK: 0xe6,0x12,0x34,0x54
+beq 0x123454
+! CHECK: 0xe6,0x12,0x34,0x55
+bvc 0x123454
+! CHECK: 0xe8,0x12,0x34,0x54
+bvs 0x123454
+! CHECK: 0xe8,0x12,0x34,0x55
+bpl 0x123454
+! CHECK: 0xea,0x12,0x34,0x54
+bmi 0x123454
+! CHECK: 0xea,0x12,0x34,0x55
+bge 0x123454
+! CHECK: 0xec,0x12,0x34,0x54
+blt 0x123454
+! CHECK: 0xec,0x12,0x34,0x55
+bgt 0x123454
+! CHECK: 0xee,0x12,0x34,0x54
+bt %r19
+! CHECK: 0xc1,0x00,0x9d,0x00
+bt.r 0x5678
+! CHECK: 0xe1,0x00,0x56,0x7a
+bf.r 0x5678
+! CHECK: 0xe1,0x00,0x56,0x7b
+bhi.r 0x5678
+! CHECK: 0xe3,0x00,0x56,0x7a
+bugt.r 0x5678
+! CHECK: 0xe3,0x00,0x56,0x7a
+bls.r 0x5678
+! CHECK: 0xe3,0x00,0x56,0x7b
+bule.r 0x5678
+! CHECK: 0xe3,0x00,0x56,0x7b
+bcc.r 0x5678
+! CHECK: 0xe5,0x00,0x56,0x7a
+bult.r 0x5678
+! CHECK: 0xe5,0x00,0x56,0x7a
+bcs.r 0x5678
+! CHECK: 0xe5,0x00,0x56,0x7b
+buge.r 0x5678
+! CHECK: 0xe5,0x00,0x56,0x7b
+bne.r 0x5678
+! CHECK: 0xe7,0x00,0x56,0x7a
+beq.r 0x5678
+! CHECK: 0xe7,0x00,0x56,0x7b
+bvc.r 0x5678
+! CHECK: 0xe9,0x00,0x56,0x7a
+bvs.r 0x5678
+! CHECK: 0xe9,0x00,0x56,0x7b
+bpl.r 0x5678
+! CHECK: 0xeb,0x00,0x56,0x7a
+bmi.r 0x5678
+! CHECK: 0xeb,0x00,0x56,0x7b
+bge.r 0x5678
+! CHECK: 0xed,0x00,0x56,0x7a
+blt.r 0x5678
+! CHECK: 0xed,0x00,0x56,0x7b
+bgt.r 0x5678
+! CHECK: 0xef,0x00,0x56,0x7a
+ld -32768[%r17], %r21
+! CHECK: 0x8a,0xc6,0x80,0x00
+ld -1024[%r17], %r21
+! CHECK: 0x8a,0xc6,0xfc,0x00
+ld 0[%r17], %r21
+! CHECK: 0x8a,0xc4,0x00,0x00
+ld 1024[%r17], %r21
+! CHECK: 0x8a,0xc6,0x04,0x00
+ld 32767[%r17], %r21
+! CHECK: 0x8a,0xc6,0x7f,0xff
+uld -32768[%r17], %r21
+! CHECK: 0x8a,0xc6,0x80,0x00
+uld -1024[%r17], %r21
+! CHECK: 0x8a,0xc6,0xfc,0x00
+uld 0[%r17], %r21
+! CHECK: 0x8a,0xc4,0x00,0x00
+uld 1024[%r17], %r21
+! CHECK: 0x8a,0xc6,0x04,0x00
+uld 32767[%r17], %r21
+! CHECK: 0x8a,0xc6,0x7f,0xff
+ld %r18[%r17], %r21
+! CHECK: 0xaa,0xc6,0x90,0x02
+uld %r18[%r17], %r21
+! CHECK: 0xaa,0xc6,0x90,0x03
+ld.h -512[%r17], %r21
+! CHECK: 0xfa,0xc7,0x0a,0x00
+ld.h -13[%r17], %r21
+! CHECK: 0xfa,0xc7,0x0b,0xf3
+ld.h 18[%r17], %r21
+! CHECK: 0xfa,0xc7,0x08,0x12
+ld.h 511[%r17], %r21
+! CHECK: 0xfa,0xc7,0x09,0xff
+ld.b -512[%r17], %r21
+! CHECK: 0xfa,0xc7,0x4a,0x00
+ld.b -13[%r17], %r21
+! CHECK: 0xfa,0xc7,0x4b,0xf3
+ld.b 18[%r17], %r21
+! CHECK: 0xfa,0xc7,0x48,0x12
+ld.b 511[%r17], %r21
+! CHECK: 0xfa,0xc7,0x49,0xff
+uld.h -512[%r17], %r21
+! CHECK: 0xfa,0xc7,0x1a,0x00
+uld.h -13[%r17], %r21
+! CHECK: 0xfa,0xc7,0x1b,0xf3
+uld.h 18[%r17], %r21
+! CHECK: 0xfa,0xc7,0x18,0x12
+uld.h 511[%r17], %r21
+! CHECK: 0xfa,0xc7,0x19,0xff
+uld.b -512[%r17], %r21
+! CHECK: 0xfa,0xc7,0x5a,0x00
+uld.b -13[%r17], %r21
+! CHECK: 0xfa,0xc7,0x5b,0xf3
+uld.b 18[%r17], %r21
+! CHECK: 0xfa,0xc7,0x58,0x12
+uld.b 511[%r17], %r21
+! CHECK: 0xfa,0xc7,0x59,0xff
+ld -32768[*%r17], %r21
+! CHECK: 0x8a,0xc7,0x80,0x00
+ld -1024[*%r17], %r21
+! CHECK: 0x8a,0xc7,0xfc,0x00
+ld 0[*%r17], %r21
+! CHECK: 0x8a,0xc4,0x00,0x00
+ld 1024[*%r17], %r21
+! CHECK: 0x8a,0xc7,0x04,0x00
+ld 32767[*%r17], %r21
+! CHECK: 0x8a,0xc7,0x7f,0xff
+uld -32768[*%r17], %r21
+! CHECK: 0x8a,0xc7,0x80,0x00
+uld -1024[*%r17], %r21
+! CHECK: 0x8a,0xc7,0xfc,0x00
+uld 0[*%r17], %r21
+! CHECK: 0x8a,0xc4,0x00,0x00
+uld 1024[*%r17], %r21
+! CHECK: 0x8a,0xc7,0x04,0x00
+uld 32767[*%r17], %r21
+! CHECK: 0x8a,0xc7,0x7f,0xff
+ld [--%r17], %r21
+! CHECK: 0x8a,0xc7,0xff,0xfc
+ld [++%r17], %r21
+! CHECK: 0x8a,0xc7,0x00,0x04
+ld.h [--%r17], %r21
+! CHECK: 0xfa,0xc7,0x0f,0xfe
+ld.h [++%r17], %r21
+! CHECK: 0xfa,0xc7,0x0c,0x02
+uld.h [--%r17], %r21
+! CHECK: 0xfa,0xc7,0x1f,0xfe
+uld.h [++%r17], %r21
+! CHECK: 0xfa,0xc7,0x1c,0x02
+ld.b [--%r17], %r21
+! CHECK: 0xfa,0xc7,0x4f,0xff
+ld.b [++%r17], %r21
+! CHECK: 0xfa,0xc7,0x4c,0x01
+uld.b [--%r17], %r21
+! CHECK: 0xfa,0xc7,0x5f,0xff
+uld.b [++%r17], %r21
+! CHECK: 0xfa,0xc7,0x5c,0x01
+ld %r18[*%r17], %r21
+! CHECK: 0xaa,0xc7,0x90,0x02
+uld %r18[*%r17], %r21
+! CHECK: 0xaa,0xc7,0x90,0x03
+ld.h -512[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x0e,0x00
+ld.h -13[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x0f,0xf3
+ld.h 18[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x0c,0x12
+ld.h 511[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x0d,0xff
+ld.b -512[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x4e,0x00
+ld.b -13[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x4f,0xf3
+ld.b 18[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x4c,0x12
+ld.b 511[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x4d,0xff
+uld.h -512[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x1e,0x00
+uld.h -13[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x1f,0xf3
+uld.h 18[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x1c,0x12
+uld.h 511[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x1d,0xff
+uld.b -512[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x5e,0x00
+uld.b -13[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x5f,0xf3
+uld.b 18[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x5c,0x12
+uld.b 511[*%r17], %r21
+! CHECK: 0xfa,0xc7,0x5d,0xff
+ld -32768[%r17*], %r21
+! CHECK: 0x8a,0xc5,0x80,0x00
+ld -1024[%r17*], %r21
+! CHECK: 0x8a,0xc5,0xfc,0x00
+ld 0[%r17*], %r21
+! CHECK: 0x8a,0xc4,0x00,0x00
+ld 1024[%r17*], %r21
+! CHECK: 0x8a,0xc5,0x04,0x00
+ld 32767[%r17*], %r21
+! CHECK: 0x8a,0xc5,0x7f,0xff
+uld -32768[%r17*], %r21
+! CHECK: 0x8a,0xc5,0x80,0x00
+uld -1024[%r17*], %r21
+! CHECK: 0x8a,0xc5,0xfc,0x00
+uld 0[%r17*], %r21
+! CHECK: 0x8a,0xc4,0x00,0x00
+uld 1024[%r17*], %r21
+! CHECK: 0x8a,0xc5,0x04,0x00
+uld 32767[%r17*], %r21
+! CHECK: 0x8a,0xc5,0x7f,0xff
+ld [%r17--], %r21
+! CHECK: 0x8a,0xc5,0xff,0xfc
+ld [%r17++], %r21
+! CHECK: 0x8a,0xc5,0x00,0x04
+ld.h [%r17--], %r21
+! CHECK: 0xfa,0xc7,0x07,0xfe
+ld.h [%r17++], %r21
+! CHECK: 0xfa,0xc7,0x04,0x02
+uld.h [%r17--], %r21
+! CHECK: 0xfa,0xc7,0x17,0xfe
+uld.h [%r17++], %r21
+! CHECK: 0xfa,0xc7,0x14,0x02
+ld.b [%r17--], %r21
+! CHECK: 0xfa,0xc7,0x47,0xff
+ld.b [%r17++], %r21
+! CHECK: 0xfa,0xc7,0x44,0x01
+uld.b [%r17--], %r21
+! CHECK: 0xfa,0xc7,0x57,0xff
+uld.b [%r17++], %r21
+! CHECK: 0xfa,0xc7,0x54,0x01
+ld %r18[%r17*], %r21
+! CHECK: 0xaa,0xc5,0x90,0x02
+uld %r18[%r17*], %r21
+! CHECK: 0xaa,0xc5,0x90,0x03
+ld.h -512[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x06,0x00
+ld.h -13[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x07,0xf3
+ld.h 18[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x04,0x12
+ld.h 511[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x05,0xff
+ld.b -512[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x46,0x00
+ld.b -13[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x47,0xf3
+ld.b 18[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x44,0x12
+ld.b 511[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x45,0xff
+uld.h -512[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x16,0x00
+uld.h -13[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x17,0xf3
+uld.h 18[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x14,0x12
+uld.h 511[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x15,0xff
+uld.b -512[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x56,0x00
+uld.b -13[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x57,0xf3
+uld.b 18[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x54,0x12
+uld.b 511[%r17*], %r21
+! CHECK: 0xfa,0xc7,0x55,0xff
+ld [%r17 add %r18], %r21
+! CHECK: 0xaa,0xc6,0x90,0x02
+ld [%r17 addc %r18], %r21
+! CHECK: 0xaa,0xc6,0x91,0x02
+ld [%r17 sub %r18], %r21
+! CHECK: 0xaa,0xc6,0x92,0x02
+ld [%r17 subb %r18], %r21
+! CHECK: 0xaa,0xc6,0x93,0x02
+ld [%r17 and %r18], %r21
+! CHECK: 0xaa,0xc6,0x94,0x02
+ld [%r17 or %r18], %r21
+! CHECK: 0xaa,0xc6,0x95,0x02
+ld [%r17 xor %r18], %r21
+! CHECK: 0xaa,0xc6,0x96,0x02
+ld [%r17 sh %r18], %r21
+! CHECK: 0xaa,0xc6,0x97,0x82
+ld [%r17 sha %r18], %r21
+! CHECK: 0xaa,0xc6,0x97,0xc2
+ld [*%r17 add %r18], %r21
+! CHECK: 0xaa,0xc7,0x90,0x02
+ld [*%r17 addc %r18], %r21
+! CHECK: 0xaa,0xc7,0x91,0x02
+ld [*%r17 sub %r18], %r21
+! CHECK: 0xaa,0xc7,0x92,0x02
+ld [*%r17 subb %r18], %r21
+! CHECK: 0xaa,0xc7,0x93,0x02
+ld [*%r17 and %r18], %r21
+! CHECK: 0xaa,0xc7,0x94,0x02
+ld [*%r17 or %r18], %r21
+! CHECK: 0xaa,0xc7,0x95,0x02
+ld [*%r17 xor %r18], %r21
+! CHECK: 0xaa,0xc7,0x96,0x02
+ld [*%r17 sh %r18], %r21
+! CHECK: 0xaa,0xc7,0x97,0x82
+ld [*%r17 sha %r18], %r21
+! CHECK: 0xaa,0xc7,0x97,0xc2
+ld [%r17* add %r18], %r21
+! CHECK: 0xaa,0xc5,0x90,0x02
+ld [%r17* addc %r18], %r21
+! CHECK: 0xaa,0xc5,0x91,0x02
+ld [%r17* sub %r18], %r21
+! CHECK: 0xaa,0xc5,0x92,0x02
+ld [%r17* subb %r18], %r21
+! CHECK: 0xaa,0xc5,0x93,0x02
+ld [%r17* and %r18], %r21
+! CHECK: 0xaa,0xc5,0x94,0x02
+ld [%r17* or %r18], %r21
+! CHECK: 0xaa,0xc5,0x95,0x02
+ld [%r17* xor %r18], %r21
+! CHECK: 0xaa,0xc5,0x96,0x02
+ld [%r17* sh %r18], %r21
+! CHECK: 0xaa,0xc5,0x97,0x82
+ld [%r17* sha %r18], %r21
+! CHECK: 0xaa,0xc5,0x97,0xc2
+ld [0x12344], %r21
+! CHECK: 0xfa,0x84,0x23,0x44
+leadz %r17, %r21
+! CHECK: 0xda,0xc4,0x00,0x02
+mov 0, %r17
+! CHECK: 0x08,0x80,0x00,0x00
+mov 0x00001234, %r17
+! CHECK: 0x08,0x80,0x12,0x34
+mov 0x12340000, %r17
+! CHECK: 0x08,0x81,0x12,0x34
+mov 0xaaaa0000, %r17
+! CHECK: 0x08,0x81,0xaa,0xaa
+mov %r18, %r17
+! CHECK: 0xc8,0xc8,0x00,0x00
+mov 0x12344, %r17
+! CHECK: 0xf8,0x86,0x23,0x44
+mov 0xffff1234, %r17
+! CHECK: 0x48,0x84,0x12,0x34
+mov 0x1234ffff, %r17
+! CHECK: 0x48,0x85,0x12,0x34
+nop
+! CHECK: 0x00,0x00,0x00,0x01
+or %r17, 0, %r21
+! CHECK: 0x5a,0xc4,0x00,0x00
+or %r17, 0x00001234, %r21
+! CHECK: 0x5a,0xc4,0x12,0x34
+or %r17, 0x12340000, %r21
+! CHECK: 0x5a,0xc5,0x12,0x34
+or.f %r17, 0, %r21
+! CHECK: 0x5a,0xc6,0x00,0x00
+or.f %r17, 0x00001234, %r21
+! CHECK: 0x5a,0xc6,0x12,0x34
+or.f %r17, 0x12340000, %r21
+! CHECK: 0x5a,0xc7,0x12,0x34
+or %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x95,0x00
+or.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x95,0x00
+popc %r17, %r21
+! CHECK: 0xda,0xc4,0x00,0x01
+st %r21
+! CHECK: 0xe0,0x54,0x00,0x02
+shi %r21
+! CHECK: 0xe2,0x54,0x00,0x02
+sugt %r21
+! CHECK: 0xe2,0x54,0x00,0x02
+sls %r21
+! CHECK: 0xe2,0x54,0x00,0x03
+sule %r21
+! CHECK: 0xe2,0x54,0x00,0x03
+scc %r21
+! CHECK: 0xe4,0x54,0x00,0x02
+sult %r21
+! CHECK: 0xe4,0x54,0x00,0x02
+scs %r21
+! CHECK: 0xe4,0x54,0x00,0x03
+suge %r21
+! CHECK: 0xe4,0x54,0x00,0x03
+sne %r21
+! CHECK: 0xe6,0x54,0x00,0x02
+seq %r21
+! CHECK: 0xe6,0x54,0x00,0x03
+svc %r21
+! CHECK: 0xe8,0x54,0x00,0x02
+svs %r21
+! CHECK: 0xe8,0x54,0x00,0x03
+spl %r21
+! CHECK: 0xea,0x54,0x00,0x02
+smi %r21
+! CHECK: 0xea,0x54,0x00,0x03
+sge %r21
+! CHECK: 0xec,0x54,0x00,0x02
+slt %r21
+! CHECK: 0xec,0x54,0x00,0x03
+sgt %r21
+! CHECK: 0xee,0x54,0x00,0x02
+sh %r17, -31, %r21
+! CHECK: 0x7a,0xc4,0xff,0xe1
+sh %r17, -5, %r21
+! CHECK: 0x7a,0xc4,0xff,0xfb
+sh %r17, 2, %r21
+! CHECK: 0x7a,0xc4,0x00,0x02
+sh %r17, 31, %r21
+! CHECK: 0x7a,0xc4,0x00,0x1f
+sh.f %r17, -31, %r21
+! CHECK: 0x7a,0xc6,0xff,0xe1
+sh.f %r17, -5, %r21
+! CHECK: 0x7a,0xc6,0xff,0xfb
+sh.f %r17, 2, %r21
+! CHECK: 0x7a,0xc6,0x00,0x02
+sh.f %r17, 31, %r21
+! CHECK: 0x7a,0xc6,0x00,0x1f
+sh %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x97,0x80
+sh.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x97,0x80
+sha %r17, -31, %r21
+! CHECK: 0x7a,0xc5,0xff,0xe1
+sha %r17, -5, %r21
+! CHECK: 0x7a,0xc5,0xff,0xfb
+sha %r17, 2, %r21
+! CHECK: 0x7a,0xc5,0x00,0x02
+sha %r17, 31, %r21
+! CHECK: 0x7a,0xc5,0x00,0x1f
+sha.f %r17, -31, %r21
+! CHECK: 0x7a,0xc7,0xff,0xe1
+sha.f %r17, -5, %r21
+! CHECK: 0x7a,0xc7,0xff,0xfb
+sha.f %r17, 2, %r21
+! CHECK: 0x7a,0xc7,0x00,0x02
+sha.f %r17, 31, %r21
+! CHECK: 0x7a,0xc7,0x00,0x1f
+sha %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x97,0xc0
+sha.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x97,0xc0
+st %r17, -32768[%r19]
+! CHECK: 0x98,0xce,0x80,0x00
+st %r17, -1024[%r19]
+! CHECK: 0x98,0xce,0xfc,0x00
+st %r17, 0[%r19]
+! CHECK: 0x98,0xcc,0x00,0x00
+st %r17, 1024[%r19]
+! CHECK: 0x98,0xce,0x04,0x00
+st %r17, 32767[%r19]
+! CHECK: 0x98,0xce,0x7f,0xff
+st.h %r17, -512[%r19]
+! CHECK: 0xf8,0xcf,0x2a,0x00
+st.h %r17, -13[%r19]
+! CHECK: 0xf8,0xcf,0x2b,0xf3
+st.h %r17, 18[%r19]
+! CHECK: 0xf8,0xcf,0x28,0x12
+st.h %r17, 511[%r19]
+! CHECK: 0xf8,0xcf,0x29,0xff
+st.b %r17, -512[%r19]
+! CHECK: 0xf8,0xcf,0x6a,0x00
+st.b %r17, -13[%r19]
+! CHECK: 0xf8,0xcf,0x6b,0xf3
+st.b %r17, 18[%r19]
+! CHECK: 0xf8,0xcf,0x68,0x12
+st.b %r17, 511[%r19]
+! CHECK: 0xf8,0xcf,0x69,0xff
+st %r17, %r18[%r19]
+! CHECK: 0xb8,0xce,0x90,0x02
+st.h %r17, %r18[%r19]
+! CHECK: 0xb8,0xce,0x90,0x00
+st.b %r17, %r18[%r19]
+! CHECK: 0xb8,0xce,0x90,0x04
+st %r17, -32768[*%r19]
+! CHECK: 0x98,0xcf,0x80,0x00
+st %r17, -1024[*%r19]
+! CHECK: 0x98,0xcf,0xfc,0x00
+st %r17, 0[*%r19]
+! CHECK: 0x98,0xcc,0x00,0x00
+st %r17, 1024[*%r19]
+! CHECK: 0x98,0xcf,0x04,0x00
+st %r17, 32767[*%r19]
+! CHECK: 0x98,0xcf,0x7f,0xff
+st.h %r17, -512[*%r19]
+! CHECK: 0xf8,0xcf,0x2e,0x00
+st.h %r17, -13[*%r19]
+! CHECK: 0xf8,0xcf,0x2f,0xf3
+st.h %r17, 18[*%r19]
+! CHECK: 0xf8,0xcf,0x2c,0x12
+st.h %r17, 511[*%r19]
+! CHECK: 0xf8,0xcf,0x2d,0xff
+st.b %r17, -512[*%r19]
+! CHECK: 0xf8,0xcf,0x6e,0x00
+st.b %r17, -13[*%r19]
+! CHECK: 0xf8,0xcf,0x6f,0xf3
+st.b %r17, 18[*%r19]
+! CHECK: 0xf8,0xcf,0x6c,0x12
+st.b %r17, 511[*%r19]
+! CHECK: 0xf8,0xcf,0x6d,0xff
+st %r17, [--%r19]
+! CHECK: 0x98,0xcf,0xff,0xfc
+st %r17, [++%r19]
+! CHECK: 0x98,0xcf,0x00,0x04
+st.h %r17, [--%r19]
+! CHECK: 0xf8,0xcf,0x2f,0xfe
+st.h %r17, [++%r19]
+! CHECK: 0xf8,0xcf,0x2c,0x02
+st.b %r17, [--%r19]
+! CHECK: 0xf8,0xcf,0x6f,0xff
+st.b %r17, [++%r19]
+! CHECK: 0xf8,0xcf,0x6c,0x01
+st %r17, %r18[*%r19]
+! CHECK: 0xb8,0xcf,0x90,0x02
+st.h %r17, %r18[*%r19]
+! CHECK: 0xb8,0xcf,0x90,0x00
+st.b %r17, %r18[*%r19]
+! CHECK: 0xb8,0xcf,0x90,0x04
+st %r17, -32768[%r19*]
+! CHECK: 0x98,0xcd,0x80,0x00
+st %r17, -1024[%r19*]
+! CHECK: 0x98,0xcd,0xfc,0x00
+st %r17, 0[%r19*]
+! CHECK: 0x98,0xcc,0x00,0x00
+st %r17, 1024[%r19*]
+! CHECK: 0x98,0xcd,0x04,0x00
+st %r17, 32767[%r19*]
+! CHECK: 0x98,0xcd,0x7f,0xff
+st.h %r17, -512[%r19*]
+! CHECK: 0xf8,0xcf,0x26,0x00
+st.h %r17, -13[%r19*]
+! CHECK: 0xf8,0xcf,0x27,0xf3
+st.h %r17, 18[%r19*]
+! CHECK: 0xf8,0xcf,0x24,0x12
+st.h %r17, 511[%r19*]
+! CHECK: 0xf8,0xcf,0x25,0xff
+st.b %r17, -512[%r19*]
+! CHECK: 0xf8,0xcf,0x66,0x00
+st.b %r17, -13[%r19*]
+! CHECK: 0xf8,0xcf,0x67,0xf3
+st.b %r17, 18[%r19*]
+! CHECK: 0xf8,0xcf,0x64,0x12
+st.b %r17, 511[%r19*]
+! CHECK: 0xf8,0xcf,0x65,0xff
+st %r17, [%r19--]
+! CHECK: 0x98,0xcd,0xff,0xfc
+st %r17, [%r19++]
+! CHECK: 0x98,0xcd,0x00,0x04
+st.h %r17, [%r19--]
+! CHECK: 0xf8,0xcf,0x27,0xfe
+st.h %r17, [%r19++]
+! CHECK: 0xf8,0xcf,0x24,0x02
+st.b %r17, [%r19--]
+! CHECK: 0xf8,0xcf,0x67,0xff
+st.b %r17, [%r19++]
+! CHECK: 0xf8,0xcf,0x64,0x01
+st %r17, %r18[%r19*]
+! CHECK: 0xb8,0xcd,0x90,0x02
+st.h %r17, %r18[%r19*]
+! CHECK: 0xb8,0xcd,0x90,0x00
+st.b %r17, %r18[%r19*]
+! CHECK: 0xb8,0xcd,0x90,0x04
+st %r21, [%r17 add %r18]
+! CHECK: 0xba,0xc6,0x90,0x02
+st %r21, [%r17 addc %r18]
+! CHECK: 0xba,0xc6,0x91,0x02
+st %r21, [%r17 sub %r18]
+! CHECK: 0xba,0xc6,0x92,0x02
+st %r21, [%r17 subb %r18]
+! CHECK: 0xba,0xc6,0x93,0x02
+st %r21, [%r17 and %r18]
+! CHECK: 0xba,0xc6,0x94,0x02
+st %r21, [%r17 or %r18]
+! CHECK: 0xba,0xc6,0x95,0x02
+st %r21, [%r17 xor %r18]
+! CHECK: 0xba,0xc6,0x96,0x02
+st %r21, [%r17 sh %r18]
+! CHECK: 0xba,0xc6,0x97,0x82
+st %r21, [%r17 sha %r18]
+! CHECK: 0xba,0xc6,0x97,0xc2
+st.h %r21, [%r17 add %r18]
+! CHECK: 0xba,0xc6,0x90,0x00
+st.h %r21, [%r17 addc %r18]
+! CHECK: 0xba,0xc6,0x91,0x00
+st.h %r21, [%r17 sub %r18]
+! CHECK: 0xba,0xc6,0x92,0x00
+st.h %r21, [%r17 subb %r18]
+! CHECK: 0xba,0xc6,0x93,0x00
+st.h %r21, [%r17 and %r18]
+! CHECK: 0xba,0xc6,0x94,0x00
+st.h %r21, [%r17 or %r18]
+! CHECK: 0xba,0xc6,0x95,0x00
+st.h %r21, [%r17 xor %r18]
+! CHECK: 0xba,0xc6,0x96,0x00
+st.h %r21, [%r17 sh %r18]
+! CHECK: 0xba,0xc6,0x97,0x80
+st.h %r21, [%r17 sha %r18]
+! CHECK: 0xba,0xc6,0x97,0xc0
+st.b %r21, [%r17 add %r18]
+! CHECK: 0xba,0xc6,0x90,0x04
+st.b %r21, [%r17 addc %r18]
+! CHECK: 0xba,0xc6,0x91,0x04
+st.b %r21, [%r17 sub %r18]
+! CHECK: 0xba,0xc6,0x92,0x04
+st.b %r21, [%r17 subb %r18]
+! CHECK: 0xba,0xc6,0x93,0x04
+st.b %r21, [%r17 and %r18]
+! CHECK: 0xba,0xc6,0x94,0x04
+st.b %r21, [%r17 or %r18]
+! CHECK: 0xba,0xc6,0x95,0x04
+st.b %r21, [%r17 xor %r18]
+! CHECK: 0xba,0xc6,0x96,0x04
+st.b %r21, [%r17 sh %r18]
+! CHECK: 0xba,0xc6,0x97,0x84
+st.b %r21, [%r17 sha %r18]
+! CHECK: 0xba,0xc6,0x97,0xc4
+st %r21, [*%r17 add %r18]
+! CHECK: 0xba,0xc7,0x90,0x02
+st %r21, [*%r17 addc %r18]
+! CHECK: 0xba,0xc7,0x91,0x02
+st %r21, [*%r17 sub %r18]
+! CHECK: 0xba,0xc7,0x92,0x02
+st %r21, [*%r17 subb %r18]
+! CHECK: 0xba,0xc7,0x93,0x02
+st %r21, [*%r17 and %r18]
+! CHECK: 0xba,0xc7,0x94,0x02
+st %r21, [*%r17 or %r18]
+! CHECK: 0xba,0xc7,0x95,0x02
+st %r21, [*%r17 xor %r18]
+! CHECK: 0xba,0xc7,0x96,0x02
+st %r21, [*%r17 sha %r18]
+! CHECK: 0xba,0xc7,0x97,0xc2
+st.h %r21, [*%r17 add %r18]
+! CHECK: 0xba,0xc7,0x90,0x00
+st.h %r21, [*%r17 addc %r18]
+! CHECK: 0xba,0xc7,0x91,0x00
+st.h %r21, [*%r17 sub %r18]
+! CHECK: 0xba,0xc7,0x92,0x00
+st.h %r21, [*%r17 subb %r18]
+! CHECK: 0xba,0xc7,0x93,0x00
+st.h %r21, [*%r17 and %r18]
+! CHECK: 0xba,0xc7,0x94,0x00
+st.h %r21, [*%r17 or %r18]
+! CHECK: 0xba,0xc7,0x95,0x00
+st.h %r21, [*%r17 xor %r18]
+! CHECK: 0xba,0xc7,0x96,0x00
+st.h %r21, [*%r17 sha %r18]
+! CHECK: 0xba,0xc7,0x97,0xc0
+st.b %r21, [*%r17 add %r18]
+! CHECK: 0xba,0xc7,0x90,0x04
+st.b %r21, [*%r17 addc %r18]
+! CHECK: 0xba,0xc7,0x91,0x04
+st.b %r21, [*%r17 sub %r18]
+! CHECK: 0xba,0xc7,0x92,0x04
+st.b %r21, [*%r17 subb %r18]
+! CHECK: 0xba,0xc7,0x93,0x04
+st.b %r21, [*%r17 and %r18]
+! CHECK: 0xba,0xc7,0x94,0x04
+st.b %r21, [*%r17 or %r18]
+! CHECK: 0xba,0xc7,0x95,0x04
+st.b %r21, [*%r17 xor %r18]
+! CHECK: 0xba,0xc7,0x96,0x04
+st.b %r21, [*%r17 sha %r18]
+! CHECK: 0xba,0xc7,0x97,0xc4
+st %r21, [%r17* add %r18]
+! CHECK: 0xba,0xc5,0x90,0x02
+st %r21, [%r17* addc %r18]
+! CHECK: 0xba,0xc5,0x91,0x02
+st %r21, [%r17* sub %r18]
+! CHECK: 0xba,0xc5,0x92,0x02
+st %r21, [%r17* subb %r18]
+! CHECK: 0xba,0xc5,0x93,0x02
+st %r21, [%r17* and %r18]
+! CHECK: 0xba,0xc5,0x94,0x02
+st %r21, [%r17* or %r18]
+! CHECK: 0xba,0xc5,0x95,0x02
+st %r21, [%r17* xor %r18]
+! CHECK: 0xba,0xc5,0x96,0x02
+st %r21, [%r17* sh %r18]
+! CHECK: 0xba,0xc5,0x97,0x82
+st %r21, [%r17* sha %r18]
+! CHECK: 0xba,0xc5,0x97,0xc2
+st.h %r21, [%r17* add %r18]
+! CHECK: 0xba,0xc5,0x90,0x00
+st.h %r21, [%r17* addc %r18]
+! CHECK: 0xba,0xc5,0x91,0x00
+st.h %r21, [%r17* sub %r18]
+! CHECK: 0xba,0xc5,0x92,0x00
+st.h %r21, [%r17* subb %r18]
+! CHECK: 0xba,0xc5,0x93,0x00
+st.h %r21, [%r17* and %r18]
+! CHECK: 0xba,0xc5,0x94,0x00
+st.h %r21, [%r17* or %r18]
+! CHECK: 0xba,0xc5,0x95,0x00
+st.h %r21, [%r17* xor %r18]
+! CHECK: 0xba,0xc5,0x96,0x00
+st.h %r21, [%r17* sh %r18]
+! CHECK: 0xba,0xc5,0x97,0x80
+st.h %r21, [%r17* sha %r18]
+! CHECK: 0xba,0xc5,0x97,0xc0
+st.b %r21, [%r17* add %r18]
+! CHECK: 0xba,0xc5,0x90,0x04
+st.b %r21, [%r17* addc %r18]
+! CHECK: 0xba,0xc5,0x91,0x04
+st.b %r21, [%r17* sub %r18]
+! CHECK: 0xba,0xc5,0x92,0x04
+st.b %r21, [%r17* subb %r18]
+! CHECK: 0xba,0xc5,0x93,0x04
+st.b %r21, [%r17* and %r18]
+! CHECK: 0xba,0xc5,0x94,0x04
+st.b %r21, [%r17* or %r18]
+! CHECK: 0xba,0xc5,0x95,0x04
+st.b %r21, [%r17* xor %r18]
+! CHECK: 0xba,0xc5,0x96,0x04
+st.b %r21, [%r17* sh %r18]
+! CHECK: 0xba,0xc5,0x97,0x84
+st.b %r21, [%r17* sha %r18]
+! CHECK: 0xba,0xc5,0x97,0xc4
+st %r21, [0x12344]
+! CHECK: 0xfa,0x85,0x23,0x44
+sub %r17, 0, %r21
+! CHECK: 0x2a,0xc4,0x00,0x00
+sub %r17, 0x00001234, %r21
+! CHECK: 0x2a,0xc4,0x12,0x34
+sub %r17, 0x12340000, %r21
+! CHECK: 0x2a,0xc5,0x12,0x34
+sub.f %r17, 0, %r21
+! CHECK: 0x2a,0xc6,0x00,0x00
+sub.f %r17, 0x00001234, %r21
+! CHECK: 0x2a,0xc6,0x12,0x34
+sub.f %r17, 0x12340000, %r21
+! CHECK: 0x2a,0xc7,0x12,0x34
+sub %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x92,0x00
+sub.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x92,0x00
+subb %r17, 0, %r21
+! CHECK: 0x3a,0xc4,0x00,0x00
+subb %r17, 0x00001234, %r21
+! CHECK: 0x3a,0xc4,0x12,0x34
+subb %r17, 0x12340000, %r21
+! CHECK: 0x3a,0xc5,0x12,0x34
+subb.f %r17, 0, %r21
+! CHECK: 0x3a,0xc6,0x00,0x00
+subb.f %r17, 0x00001234, %r21
+! CHECK: 0x3a,0xc6,0x12,0x34
+subb.f %r17, 0x12340000, %r21
+! CHECK: 0x3a,0xc7,0x12,0x34
+subb %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x93,0x00
+subb.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x93,0x00
+xor %r17, 0, %r21
+! CHECK: 0x6a,0xc4,0x00,0x00
+xor %r17, 0x00001234, %r21
+! CHECK: 0x6a,0xc4,0x12,0x34
+xor %r17, 0x12340000, %r21
+! CHECK: 0x6a,0xc5,0x12,0x34
+xor.f %r17, 0, %r21
+! CHECK: 0x6a,0xc6,0x00,0x00
+xor.f %r17, 0x00001234, %r21
+! CHECK: 0x6a,0xc6,0x12,0x34
+xor.f %r17, 0x12340000, %r21
+! CHECK: 0x6a,0xc7,0x12,0x34
+xor %r17, %r18, %r21
+! CHECK: 0xca,0xc4,0x96,0x00
+xor.f %r17, %r18, %r21
+! CHECK: 0xca,0xc6,0x96,0x00
+
+
diff --git a/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml b/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml
index 3a31a3901a2..aa45ca16b34 100644
--- a/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml
+++ b/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml
@@ -1,7 +1,7 @@
# RUN: yaml2obj -format=elf %s > %t
# RUN: llvm-readobj -r %t | FileCheck %s
-# CHECK : Relocations [
+# CHECK: Relocations [
# CHECK-NEXT: Section (2) .rel.text {
# CHECK-NEXT: 0x0 R_LANAI_32 main 0x0
# CHECK-NEXT: 0x4 R_LANAI_NONE - 0x0
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-03 08:12:33 +0000