1 files changed, 36 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll b/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
index 43d4add243d..5176cdcb600 100644
--- a/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
+++ b/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -verify-machineinstrs -print-before=peephole-opt -print-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o /dev/null 2>&1 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -print-before=peephole-opt -print-after=peephole-opt -mtriple=powerpc64le-unknown-linux-gnu -o /dev/null 2>&1 < %s | FileCheck %s
 
 ; CHECK-LABEL: fn1
 define signext i32 @fn1(i32 %baz) {
@@ -99,3 +100,38 @@ foo:
 bar:
   ret i32 0
 }
+
+; This test confirms record-form instructions are emitted for comparison
+; against a non-zero value.
+
+; CHECK-LABEL: fn6
+define i8* @fn6(i8* readonly %p) {
+; CHECK: LBZU
+; CHECK: EXTSBo
+; CHECK-NOT: CMP
+; CHECK: BCC
+; CHECK: LBZU
+; CHECK: EXTSBo
+; CHECK-NOT: CMP
+; CHECK: BCC
+
+entry:
+  %incdec.ptr = getelementptr inbounds i8, i8* %p, i64 -1
+  %0 = load i8, i8* %incdec.ptr
+  %cmp = icmp sgt i8 %0, -1
+  br i1 %cmp, label %out, label %if.end
+
+if.end:
+  %incdec.ptr2 = getelementptr inbounds i8, i8* %p, i64 -2
+  %1 = load i8, i8* %incdec.ptr2
+  %cmp4 = icmp sgt i8 %1, -1
+  br i1 %cmp4, label %out, label %cleanup
+
+out:
+  %p.addr.0 = phi i8* [ %incdec.ptr, %entry ], [ %incdec.ptr2, %if.end ]
+  br label %cleanup
+
+cleanup:
+  %retval.0 = phi i8* [ %p.addr.0, %out ], [ null, %if.end ]
+  ret i8* %retval.0
+}