diff options
Diffstat (limited to 'test/CodeGen/Mips/msa/i5_ld_st.ll')
| -rw-r--r-- | test/CodeGen/Mips/msa/i5_ld_st.ll | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/test/CodeGen/Mips/msa/i5_ld_st.ll b/test/CodeGen/Mips/msa/i5_ld_st.ll index 812c400d46e..c644d242a00 100644 --- a/test/CodeGen/Mips/msa/i5_ld_st.ll +++ b/test/CodeGen/Mips/msa/i5_ld_st.ll @@ -336,8 +336,8 @@ entry: ; CHECK: llvm_mips_st_b_valid_range_tests: ; CHECK: ld.b -; CHECK-DAG: st.b [[R1:\$w[0-9]+]], -512( -; CHECK-DAG: st.b [[R1:\$w[0-9]+]], 511( +; CHECK: st.b [[R1:\$w[0-9]+]], -512( +; CHECK: st.b [[R1:\$w[0-9]+]], 511( ; CHECK: .size llvm_mips_st_b_valid_range_tests ; @@ -351,10 +351,10 @@ entry: } ; CHECK: llvm_mips_st_b_invalid_range_tests: -; CHECK: addiu $2, $1, 512 +; CHECK: addiu $2, $1, -513 ; CHECK: ld.b ; CHECK: st.b [[R1:\$w[0-9]+]], 0( -; CHECK: addiu $1, $1, -513 +; CHECK: addiu $1, $1, 512 ; CHECK: st.b [[R1:\$w[0-9]+]], 0( ; CHECK: .size llvm_mips_st_b_invalid_range_tests ; @@ -404,8 +404,8 @@ entry: ; CHECK: llvm_mips_st_h_valid_range_tests: ; CHECK: ld.h -; CHECK-DAG: st.h [[R1:\$w[0-9]+]], -1024( -; CHECK-DAG: st.h [[R1:\$w[0-9]+]], 1022( +; CHECK: st.h [[R1:\$w[0-9]+]], -1024( +; CHECK: st.h [[R1:\$w[0-9]+]], 1022( ; CHECK: .size llvm_mips_st_h_valid_range_tests ; @@ -419,10 +419,10 @@ entry: } ; CHECK: llvm_mips_st_h_invalid_range_tests: -; CHECK: addiu $2, $1, 1024 +; CHECK: addiu $2, $1, -1026 ; CHECK: ld.h ; CHECK: st.h [[R1:\$w[0-9]+]], 0( -; CHECK: addiu $1, $1, -1026 +; CHECK: addiu $1, $1, 1024 ; CHECK: st.h [[R1:\$w[0-9]+]], 0( ; CHECK: .size llvm_mips_st_h_invalid_range_tests ; @@ -472,8 +472,8 @@ entry: ; CHECK: llvm_mips_st_w_valid_range_tests: ; CHECK: ld.w -; CHECK-DAG: st.w [[R1:\$w[0-9]+]], -2048( -; CHECK-DAG: st.w [[R1:\$w[0-9]+]], 2044( +; CHECK: st.w [[R1:\$w[0-9]+]], -2048( +; CHECK: st.w [[R1:\$w[0-9]+]], 2044( ; CHECK: .size llvm_mips_st_w_valid_range_tests ; @@ -487,10 +487,10 @@ entry: } ; CHECK: llvm_mips_st_w_invalid_range_tests: -; CHECK: addiu $2, $1, 2048 +; CHECK: addiu $2, $1, -2052 ; CHECK: ld.w ; CHECK: st.w [[R1:\$w[0-9]+]], 0( -; CHECK: addiu $1, $1, -2052 +; CHECK: addiu $1, $1, 2048 ; CHECK: st.w [[R1:\$w[0-9]+]], 0( ; CHECK: .size llvm_mips_st_w_invalid_range_tests ; @@ -540,8 +540,8 @@ entry: ; CHECK: llvm_mips_st_d_valid_range_tests: ; CHECK: ld.d -; CHECK-DAG: st.d [[R1:\$w[0-9]+]], -4096( -; CHECK-DAG: st.d [[R1:\$w[0-9]+]], 4088( +; CHECK: st.d [[R1:\$w[0-9]+]], -4096( +; CHECK: st.d [[R1:\$w[0-9]+]], 4088( ; CHECK: .size llvm_mips_st_d_valid_range_tests ; @@ -555,10 +555,10 @@ entry: } ; CHECK: llvm_mips_st_d_invalid_range_tests: -; CHECK: addiu $2, $1, 4096 +; CHECK: addiu $2, $1, -4104 ; CHECK: ld.d ; CHECK: st.d [[R1:\$w[0-9]+]], 0( -; CHECK: addiu $1, $1, -4104 +; CHECK: addiu $1, $1, 4096 ; CHECK: st.d [[R1:\$w[0-9]+]], 0( ; CHECK: .size llvm_mips_st_d_invalid_range_tests ; |