diff options
Diffstat (limited to 'test/CodeGen/MIR/NVPTX')
| -rw-r--r-- | test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir b/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir index 312bf004a9c..71d232b58cf 100644 --- a/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir +++ b/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir @@ -43,11 +43,11 @@ body: | %0 = LD_f32_avar 0, 4, 1, 2, 32, $test_param_0 %1 = CVT_f64_f32 %0, 0 %2 = LD_i32_avar 0, 4, 1, 0, 32, $test_param_1 - ; CHECK: %3 = FADD_rnf64ri %1, double 3.250000e+00 + ; CHECK: %3:float64regs = FADD_rnf64ri %1, double 3.250000e+00 %3 = FADD_rnf64ri %1, double 3.250000e+00 %4 = CVT_f32_f64 %3, 5 %5 = CVT_f32_s32 %2, 5 - ; CHECK: %6 = FADD_rnf32ri %5, float 6.250000e+00 + ; CHECK: %6:float32regs = FADD_rnf32ri %5, float 6.250000e+00 %6 = FADD_rnf32ri %5, float 6.250000e+00 %7 = FMUL_rnf32rr %6, %4 StoreRetvalF32 %7, 0 @@ -69,11 +69,11 @@ body: | %0 = LD_f32_avar 0, 4, 1, 2, 32, $test2_param_0 %1 = CVT_f64_f32 %0, 0 %2 = LD_i32_avar 0, 4, 1, 0, 32, $test2_param_1 - ; CHECK: %3 = FADD_rnf64ri %1, double 0x7FF8000000000000 + ; CHECK: %3:float64regs = FADD_rnf64ri %1, double 0x7FF8000000000000 %3 = FADD_rnf64ri %1, double 0x7FF8000000000000 %4 = CVT_f32_f64 %3, 5 %5 = CVT_f32_s32 %2, 5 - ; CHECK: %6 = FADD_rnf32ri %5, float 0x7FF8000000000000 + ; CHECK: %6:float32regs = FADD_rnf32ri %5, float 0x7FF8000000000000 %6 = FADD_rnf32ri %5, float 0x7FF8000000000000 %7 = FMUL_rnf32rr %6, %4 StoreRetvalF32 %7, 0 |