diff options
Diffstat (limited to 'test/CodeGen/AArch64/tailcall_misched_graph.ll')
| -rw-r--r-- | test/CodeGen/AArch64/tailcall_misched_graph.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/AArch64/tailcall_misched_graph.ll b/test/CodeGen/AArch64/tailcall_misched_graph.ll index 7e76dac214a..cb42fcced8d 100644 --- a/test/CodeGen/AArch64/tailcall_misched_graph.ll +++ b/test/CodeGen/AArch64/tailcall_misched_graph.ll @@ -26,9 +26,9 @@ declare void @callee2(i8*, i8*, i8*, i8*, i8*, ; CHECK: fi#-2: {{.*}} fixed, at location [SP+8] ; CHECK: fi#-1: {{.*}} fixed, at location [SP] -; CHECK: [[VRA:%vreg.*]]<def> = LDRXui <fi#-1> -; CHECK: [[VRB:%vreg.*]]<def> = LDRXui <fi#-2> -; CHECK: STRXui %vreg{{.*}}, <fi#-4> +; CHECK: [[VRA:%.*]]<def> = LDRXui <fi#-1> +; CHECK: [[VRB:%.*]]<def> = LDRXui <fi#-2> +; CHECK: STRXui %{{.*}}, <fi#-4> ; CHECK: STRXui [[VRB]], <fi#-3> ; Make sure that there is an dependence edge between fi#-2 and fi#-4. @@ -40,5 +40,5 @@ declare void @callee2(i8*, i8*, i8*, i8*, i8*, ; CHECK: SU([[DEPSTOREB:.*]]): Ord Latency=0 ; CHECK: SU([[DEPSTOREA:.*]]): Ord Latency=0 -; CHECK: SU([[DEPSTOREA]]): STRXui %vreg{{.*}}, <fi#-4> -; CHECK: SU([[DEPSTOREB]]): STRXui %vreg{{.*}}, <fi#-3> +; CHECK: SU([[DEPSTOREA]]): STRXui %{{.*}}, <fi#-4> +; CHECK: SU([[DEPSTOREB]]): STRXui %{{.*}}, <fi#-3> |