diff options
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 38 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 1 | ||||
| -rw-r--r-- | test/CodeGen/Mips/blockaddr.ll | 15 |
3 files changed, 33 insertions, 21 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index cde9fb33500..1f1220f1920 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -801,24 +801,30 @@ SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op, SDValue MipsTargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const { + const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); + // FIXME there isn't actually debug info here + DebugLoc dl = Op.getDebugLoc(); + if (getTargetMachine().getRelocationModel() != Reloc::PIC_) { - assert(false && "implement LowerBlockAddress for -static"); - return SDValue(0, 0); - } - else { - // FIXME there isn't actually debug info here - DebugLoc dl = Op.getDebugLoc(); - const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); - SDValue BAGOTOffset = DAG.getBlockAddress(BA, MVT::i32, true, - MipsII::MO_GOT); - SDValue BALOOffset = DAG.getBlockAddress(BA, MVT::i32, true, - MipsII::MO_ABS_LO); - SDValue Load = DAG.getLoad(MVT::i32, dl, - DAG.getEntryNode(), BAGOTOffset, - MachinePointerInfo(), false, false, 0); - SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, BALOOffset); - return DAG.getNode(ISD::ADD, dl, MVT::i32, Load, Lo); + // %hi/%lo relocation + SDValue BAHi = DAG.getBlockAddress(BA, MVT::i32, true, + MipsII::MO_ABS_HI); + SDValue BALo = DAG.getBlockAddress(BA, MVT::i32, true, + MipsII::MO_ABS_LO); + SDValue Hi = DAG.getNode(MipsISD::Hi, dl, MVT::i32, BAHi); + SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, BALo); + return DAG.getNode(ISD::ADD, dl, MVT::i32, Hi, Lo); } + + SDValue BAGOTOffset = DAG.getBlockAddress(BA, MVT::i32, true, + MipsII::MO_GOT); + SDValue BALOOffset = DAG.getBlockAddress(BA, MVT::i32, true, + MipsII::MO_ABS_LO); + SDValue Load = DAG.getLoad(MVT::i32, dl, + DAG.getEntryNode(), BAGOTOffset, + MachinePointerInfo(), false, false, 0); + SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, BALOOffset); + return DAG.getNode(ISD::ADD, dl, MVT::i32, Load, Lo); } SDValue MipsTargetLowering:: diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 747ffc33cbb..19b9c359ebb 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -557,6 +557,7 @@ def : Pat<(MipsJmpLink (i32 texternalsym:$dst)), // hi/lo relocs def : Pat<(MipsHi tglobaladdr:$in), (LUi tglobaladdr:$in)>; +def : Pat<(MipsHi tblockaddress:$in), (LUi tblockaddress:$in)>; def : Pat<(add CPURegs:$hi, (MipsLo tglobaladdr:$lo)), (ADDiu CPURegs:$hi, tglobaladdr:$lo)>; def : Pat<(add CPURegs:$hi, (MipsLo tblockaddress:$lo)), diff --git a/test/CodeGen/Mips/blockaddr.ll b/test/CodeGen/Mips/blockaddr.ll index 2b0631428c5..e9af3045e15 100644 --- a/test/CodeGen/Mips/blockaddr.ll +++ b/test/CodeGen/Mips/blockaddr.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=mipsel < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=CHECK-PIC +; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck %s -check-prefix=CHECK-STATIC @reg = common global i8* null, align 4 @@ -7,10 +8,14 @@ entry: ret i8* %x } -; CHECK: lw $2, %got($tmp1)($gp) -; CHECK: addiu $4, $2, %lo($tmp1) -; CHECK: lw $2, %got($tmp2)($gp) -; CHECK: addiu $2, $2, %lo($tmp2) +; CHECK-PIC: lw $[[R0:[0-9]+]], %got($tmp1)($gp) +; CHECK-PIC: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp1) +; CHECK-PIC: lw $[[R1:[0-9]+]], %got($tmp2)($gp) +; CHECK-PIC: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp2) +; CHECK-STATIC: lui $[[R2:[0-9]+]], %hi($tmp1) +; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp1) +; CHECK-STATIC: lui $[[R3:[0-9]+]], %hi($tmp2) +; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp2) define void @f() nounwind { entry: %call = tail call i8* @dummy(i8* blockaddress(@f, %baz)) |