diff options
| -rw-r--r-- | lib/CodeGen/TargetLoweringBase.cpp | 176 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/float-intrinsics-double.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/float-intrinsics-float.ll | 2 |
3 files changed, 171 insertions, 9 deletions
diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp index 85c277a5025..46adb841d53 100644 --- a/lib/CodeGen/TargetLoweringBase.cpp +++ b/lib/CodeGen/TargetLoweringBase.cpp @@ -488,12 +488,174 @@ static void InitLibcallNames(const char **Names, const Triple &TT) { Names[RTLIB::DEOPTIMIZE] = "__llvm_deoptimize"; } -/// InitLibcallCallingConvs - Set default libcall CallingConvs. -/// -static void InitLibcallCallingConvs(CallingConv::ID *CCs) { - for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) { - CCs[i] = CallingConv::C; - } +/// Set default libcall CallingConvs. +static void InitLibcallCallingConvs(CallingConv::ID *CCs, const Triple &T) { + for (int LC = 0; LC < RTLIB::UNKNOWN_LIBCALL; ++LC) + CCs[LC] = CallingConv::C; + + // The builtins on ARM always use AAPCS, irrespective of wheter C is AAPCS or + // AAPCS_VFP. + if (T.getArch() == Triple::arm || T.getArch() == Triple::thumb) + for (const auto LC : { + RTLIB::SHL_I16, + RTLIB::SHL_I32, + RTLIB::SHL_I64, + RTLIB::SHL_I128, + RTLIB::SRL_I16, + RTLIB::SRL_I32, + RTLIB::SRL_I64, + RTLIB::SRL_I128, + RTLIB::SRA_I16, + RTLIB::SRA_I32, + RTLIB::SRA_I64, + RTLIB::SRA_I128, + RTLIB::MUL_I8, + RTLIB::MUL_I16, + RTLIB::MUL_I32, + RTLIB::MUL_I64, + RTLIB::MUL_I128, + RTLIB::MULO_I32, + RTLIB::MULO_I64, + RTLIB::MULO_I128, + RTLIB::SDIV_I8, + RTLIB::SDIV_I16, + RTLIB::SDIV_I32, + RTLIB::SDIV_I64, + RTLIB::SDIV_I128, + RTLIB::UDIV_I8, + RTLIB::UDIV_I16, + RTLIB::UDIV_I32, + RTLIB::UDIV_I64, + RTLIB::UDIV_I128, + RTLIB::SREM_I8, + RTLIB::SREM_I16, + RTLIB::SREM_I32, + RTLIB::SREM_I64, + RTLIB::SREM_I128, + RTLIB::UREM_I8, + RTLIB::UREM_I16, + RTLIB::UREM_I32, + RTLIB::UREM_I64, + RTLIB::UREM_I128, + RTLIB::SDIVREM_I8, + RTLIB::SDIVREM_I16, + RTLIB::SDIVREM_I32, + RTLIB::SDIVREM_I64, + RTLIB::SDIVREM_I128, + RTLIB::UDIVREM_I8, + RTLIB::UDIVREM_I16, + RTLIB::UDIVREM_I32, + RTLIB::UDIVREM_I64, + RTLIB::UDIVREM_I128, + RTLIB::NEG_I32, + RTLIB::NEG_I64, + RTLIB::ADD_F32, + RTLIB::ADD_F64, + RTLIB::ADD_F80, + RTLIB::ADD_F128, + RTLIB::SUB_F32, + RTLIB::SUB_F64, + RTLIB::SUB_F80, + RTLIB::SUB_F128, + RTLIB::MUL_F32, + RTLIB::MUL_F64, + RTLIB::MUL_F80, + RTLIB::MUL_F128, + RTLIB::DIV_F32, + RTLIB::DIV_F64, + RTLIB::DIV_F80, + RTLIB::DIV_F128, + RTLIB::POWI_F32, + RTLIB::POWI_F64, + RTLIB::POWI_F80, + RTLIB::POWI_F128, + RTLIB::FPEXT_F64_F128, + RTLIB::FPEXT_F32_F128, + RTLIB::FPEXT_F32_F64, + RTLIB::FPEXT_F16_F32, + RTLIB::FPROUND_F32_F16, + RTLIB::FPROUND_F64_F16, + RTLIB::FPROUND_F80_F16, + RTLIB::FPROUND_F128_F16, + RTLIB::FPROUND_F64_F32, + RTLIB::FPROUND_F80_F32, + RTLIB::FPROUND_F128_F32, + RTLIB::FPROUND_F80_F64, + RTLIB::FPROUND_F128_F64, + RTLIB::FPTOSINT_F32_I32, + RTLIB::FPTOSINT_F32_I64, + RTLIB::FPTOSINT_F32_I128, + RTLIB::FPTOSINT_F64_I32, + RTLIB::FPTOSINT_F64_I64, + RTLIB::FPTOSINT_F64_I128, + RTLIB::FPTOSINT_F80_I32, + RTLIB::FPTOSINT_F80_I64, + RTLIB::FPTOSINT_F80_I128, + RTLIB::FPTOSINT_F128_I32, + RTLIB::FPTOSINT_F128_I64, + RTLIB::FPTOSINT_F128_I128, + RTLIB::FPTOUINT_F32_I32, + RTLIB::FPTOUINT_F32_I64, + RTLIB::FPTOUINT_F32_I128, + RTLIB::FPTOUINT_F64_I32, + RTLIB::FPTOUINT_F64_I64, + RTLIB::FPTOUINT_F64_I128, + RTLIB::FPTOUINT_F80_I32, + RTLIB::FPTOUINT_F80_I64, + RTLIB::FPTOUINT_F80_I128, + RTLIB::FPTOUINT_F128_I32, + RTLIB::FPTOUINT_F128_I64, + RTLIB::FPTOUINT_F128_I128, + RTLIB::SINTTOFP_I32_F32, + RTLIB::SINTTOFP_I32_F64, + RTLIB::SINTTOFP_I32_F80, + RTLIB::SINTTOFP_I32_F128, + RTLIB::SINTTOFP_I64_F32, + RTLIB::SINTTOFP_I64_F64, + RTLIB::SINTTOFP_I64_F80, + RTLIB::SINTTOFP_I64_F128, + RTLIB::SINTTOFP_I128_F32, + RTLIB::SINTTOFP_I128_F64, + RTLIB::SINTTOFP_I128_F80, + RTLIB::SINTTOFP_I128_F128, + RTLIB::UINTTOFP_I32_F32, + RTLIB::UINTTOFP_I32_F64, + RTLIB::UINTTOFP_I32_F80, + RTLIB::UINTTOFP_I32_F128, + RTLIB::UINTTOFP_I64_F32, + RTLIB::UINTTOFP_I64_F64, + RTLIB::UINTTOFP_I64_F80, + RTLIB::UINTTOFP_I64_F128, + RTLIB::UINTTOFP_I128_F32, + RTLIB::UINTTOFP_I128_F64, + RTLIB::UINTTOFP_I128_F80, + RTLIB::UINTTOFP_I128_F128, + RTLIB::OEQ_F32, + RTLIB::OEQ_F64, + RTLIB::OEQ_F128, + RTLIB::UNE_F32, + RTLIB::UNE_F64, + RTLIB::UNE_F128, + RTLIB::OGE_F32, + RTLIB::OGE_F64, + RTLIB::OGE_F128, + RTLIB::OLT_F32, + RTLIB::OLT_F64, + RTLIB::OLT_F128, + RTLIB::OLE_F32, + RTLIB::OLE_F64, + RTLIB::OLE_F128, + RTLIB::OGT_F32, + RTLIB::OGT_F64, + RTLIB::OGT_F128, + RTLIB::UO_F32, + RTLIB::UO_F64, + RTLIB::UO_F128, + RTLIB::O_F32, + RTLIB::O_F64, + RTLIB::O_F128, + }) + CCs[LC] = CallingConv::ARM_AAPCS; } /// getFPEXT - Return the FPEXT_*_* value for the given types, or @@ -835,7 +997,7 @@ TargetLoweringBase::TargetLoweringBase(const TargetMachine &tm) : TM(tm) { InitLibcallNames(LibcallRoutineNames, TM.getTargetTriple()); InitCmpLibcallCCs(CmpLibcallCCs); - InitLibcallCallingConvs(LibcallCallingConvs); + InitLibcallCallingConvs(LibcallCallingConvs, TM.getTargetTriple()); } void TargetLoweringBase::initActions() { diff --git a/test/CodeGen/Thumb2/float-intrinsics-double.ll b/test/CodeGen/Thumb2/float-intrinsics-double.ll index 657d1b172da..9e949908382 100644 --- a/test/CodeGen/Thumb2/float-intrinsics-double.ll +++ b/test/CodeGen/Thumb2/float-intrinsics-double.ll @@ -18,7 +18,7 @@ declare double @llvm.powi.f64(double %Val, i32 %power) define double @powi_d(double %a, i32 %b) { ; CHECK-LABEL: powi_d: ; SOFT: {{(bl|b)}} __powidf2 -; HARD: b __powidf2 +; HARD: bl __powidf2 %1 = call double @llvm.powi.f64(double %a, i32 %b) ret double %1 } diff --git a/test/CodeGen/Thumb2/float-intrinsics-float.ll b/test/CodeGen/Thumb2/float-intrinsics-float.ll index 847aeacd2f9..fda840d90f3 100644 --- a/test/CodeGen/Thumb2/float-intrinsics-float.ll +++ b/test/CodeGen/Thumb2/float-intrinsics-float.ll @@ -18,7 +18,7 @@ declare float @llvm.powi.f32(float %Val, i32 %power) define float @powi_f(float %a, i32 %b) { ; CHECK-LABEL: powi_f: ; SOFT: bl __powisf2 -; HARD: b __powisf2 +; HARD: bl __powisf2 %1 = call float @llvm.powi.f32(float %a, i32 %b) ret float %1 } |